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| author | Andreas Hansson <andreas.hansson@arm.com> | 2013-03-01 13:20:19 -0500 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-03-01 13:20:19 -0500 |
| commit | cafd38f36c4d71c3f3d6efaf0023aec2cfc51b32 (patch) | |
| tree | 713f70f114707f5cd8765937c44e03f87ec0df01 /src/mem/bus.hh | |
| parent | c636a09e83b08c27ce60a0f1d13536d736a06926 (diff) | |
| download | gem5-cafd38f36c4d71c3f3d6efaf0023aec2cfc51b32.tar.xz | |
mem: Merge ranges in bus before passing them on
This patch adds basic merging of address ranges to the bus, such that
interleaved ranges are merged together before being passed on by the
bus. As such, the bus aggregates the address ranges of the connected
slave ports and then passes on the merged ranges through its master
ports. The bus thus hides the complexity of the interleaved ranges and
only exposes contigous ranges to the surrounding system.
As part of this patch, the bus ranges are also cached for any future
queries.
Diffstat (limited to 'src/mem/bus.hh')
| -rw-r--r-- | src/mem/bus.hh | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mem/bus.hh b/src/mem/bus.hh index 35c206fa9..705a3a999 100644 --- a/src/mem/bus.hh +++ b/src/mem/bus.hh @@ -232,6 +232,9 @@ class BaseBus : public MemObject typedef AddrRangeMap<PortID>::const_iterator PortMapConstIter; AddrRangeMap<PortID> portMap; + /** all contigous ranges seen by this bus */ + AddrRangeList busRanges; + AddrRange defaultRange; /** |