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| author | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-12-23 09:31:18 -0500 |
|---|---|---|
| committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-12-23 09:31:18 -0500 |
| commit | 6cb58b2bd2ffd19a667e3b9473ff4a0ccfd14c81 (patch) | |
| tree | 013ae71318955157fc22fa174655f681383bac92 /src/mem/cache/BaseCache.py | |
| parent | 4d88978913c57e0cd10751d31d7f5b95c1e00170 (diff) | |
| download | gem5-6cb58b2bd2ffd19a667e3b9473ff4a0ccfd14c81.tar.xz | |
mem: Add parameter to reserve MSHR entries for demand access
Adds a new parameter that reserves some number of MSHR entries for demand
accesses. This helps prevent prefetchers from taking all MSHRs, forcing demand
requests from the CPU to stall.
Diffstat (limited to 'src/mem/cache/BaseCache.py')
| -rw-r--r-- | src/mem/cache/BaseCache.py | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mem/cache/BaseCache.py b/src/mem/cache/BaseCache.py index 9ffe39981..035decf9a 100644 --- a/src/mem/cache/BaseCache.py +++ b/src/mem/cache/BaseCache.py @@ -54,6 +54,7 @@ class BaseCache(MemObject): max_miss_count = Param.Counter(0, "number of misses to handle before calling exit") mshrs = Param.Int("number of MSHRs (max outstanding requests)") + demand_mshr_reserve = Param.Int(1, "mshrs to reserve for demand access") size = Param.MemorySize("capacity in bytes") forward_snoops = Param.Bool(True, "forward snoops from mem side to cpu side") |