diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2015-07-03 10:14:39 -0400 |
---|---|---|
committer | Andreas Hansson <andreas.hansson@arm.com> | 2015-07-03 10:14:39 -0400 |
commit | 893533a1264bb369b47f74493adf30ce22829f34 (patch) | |
tree | 07c750519f5ac1b972be47a0ca6f68ee517d9f07 /src/mem/cache/BaseCache.py | |
parent | a262908acc0a641700a03fcea89c48133f0467cd (diff) | |
download | gem5-893533a1264bb369b47f74493adf30ce22829f34.tar.xz |
mem: Allow read-only caches and check compliance
This patch adds a parameter to the BaseCache to enable a read-only
cache, for example for the instruction cache, or table-walker cache
(not for x86). A number of checks are put in place in the code to
ensure a read-only cache does not end up with dirty data.
A follow-on patch adds suitable read requests to allow a read-only
cache to explicitly ask for clean data.
Diffstat (limited to 'src/mem/cache/BaseCache.py')
-rw-r--r-- | src/mem/cache/BaseCache.py | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mem/cache/BaseCache.py b/src/mem/cache/BaseCache.py index fdb41bf75..4d6766456 100644 --- a/src/mem/cache/BaseCache.py +++ b/src/mem/cache/BaseCache.py @@ -65,6 +65,7 @@ class BaseCache(MemObject): forward_snoops = Param.Bool(True, "Forward snoops from mem side to cpu side") is_top_level = Param.Bool(False, "Is this cache at the top level (e.g. L1)") + is_read_only = Param.Bool(False, "Is this cache read only (e.g. inst)") prefetcher = Param.BasePrefetcher(NULL,"Prefetcher attached to cache") prefetch_on_access = Param.Bool(False, |