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authorDaniel R. Carvalho <odanrc@yahoo.com.br>2018-02-19 15:13:11 +0100
committerDaniel Carvalho <odanrc@yahoo.com.br>2018-03-22 14:50:23 +0000
commitd207e9ccee411877fdeac80bb68a27900560f50f (patch)
tree120810cf72c52ed5df29436552e06f1fb11aa5ce /src/mem/cache/Cache.py
parent0473286ab1e9992a906eff380000bf90c82eeccb (diff)
downloadgem5-d207e9ccee411877fdeac80bb68a27900560f50f.tar.xz
mem-cache: Split array indexing and replacement policies.
Replacement policies (LRU, Random) are currently considered as array indexing methods, but have completely different functionalities: - Array indexers determine the possible locations for block allocation. This information is used to generate replacement candidates when conflicts happen. - Replacement policies determine which of the replacement candidates should be evicted to make room for new allocations. For this reason, they were split into different classes. Advantages: - Easier and more straightforward to implement other replacement policies (RRIP, LFU, ARC, ...) - Allow easier future implementation of cache organization schemes As now we can't assure the use of sets, the previous way to create a true LRU is not viable. Now a timestamp_bits parameter controls how many bits are dedicated for the timestamp, and a true LRU can be achieved through an infinite number of bits (although a few bits suffice in practice). Change-Id: I23750db121f1474d17831137e6ff618beb2b3eda Reviewed-on: https://gem5-review.googlesource.com/8501 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/mem/cache/Cache.py')
-rw-r--r--src/mem/cache/Cache.py6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/mem/cache/Cache.py b/src/mem/cache/Cache.py
index bac6c73e1..faee0925b 100644
--- a/src/mem/cache/Cache.py
+++ b/src/mem/cache/Cache.py
@@ -43,6 +43,7 @@ from m5.params import *
from m5.proxy import *
from MemObject import MemObject
from Prefetcher import BasePrefetcher
+from ReplacementPolicies import *
from Tags import *
class BaseCache(MemObject):
@@ -74,7 +75,10 @@ class BaseCache(MemObject):
prefetch_on_access = Param.Bool(False,
"Notify the hardware prefetcher on every access (not just misses)")
- tags = Param.BaseTags(LRU(), "Tag store (replacement policy)")
+ tags = Param.BaseTags(BaseSetAssoc(), "Tag store")
+ replacement_policy = Param.BaseReplacementPolicy(LRURP(),
+ "Replacement policy")
+
sequential_access = Param.Bool(False,
"Whether to access tags and data sequentially")