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authorNikos Nikoleris <nikos.nikoleris@arm.com>2016-10-26 11:07:27 +0100
committerAndreas Sandberg <andreas.sandberg@arm.com>2017-03-03 14:09:37 +0000
commitce2a0076c962a902f34442010f4373f7347a0156 (patch)
tree31d14ab01813fecc9b3d8f12deba1de5cdf0e6cf /src/mem/cache/base.hh
parentceb3bd9733d094b7c7d659ec5990fda26c2da27c (diff)
downloadgem5-ce2a0076c962a902f34442010f4373f7347a0156.tar.xz
mem: Use pkt::getBlockAddr instead of BaseCace::blockAlign
Change-Id: I0ed4e528cb750a323facdc811dde7f0ed1ff228e Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Hansson <andreas.hansson@arm.com>
Diffstat (limited to 'src/mem/cache/base.hh')
-rw-r--r--src/mem/cache/base.hh8
1 files changed, 2 insertions, 6 deletions
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index 4b89be967..2787eea8c 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -484,15 +484,11 @@ class BaseCache : public MemObject
return blkSize;
}
-
- Addr blockAlign(Addr addr) const { return (addr & ~(Addr(blkSize - 1))); }
-
-
const AddrRangeList &getAddrRanges() const { return addrRanges; }
MSHR *allocateMissBuffer(PacketPtr pkt, Tick time, bool sched_send = true)
{
- MSHR *mshr = mshrQueue.allocate(blockAlign(pkt->getAddr()), blkSize,
+ MSHR *mshr = mshrQueue.allocate(pkt->getBlockAddr(blkSize), blkSize,
pkt, time, order++,
allocOnFill(pkt->cmd));
@@ -513,7 +509,7 @@ class BaseCache : public MemObject
// should only see writes or clean evicts here
assert(pkt->isWrite() || pkt->cmd == MemCmd::CleanEvict);
- Addr blk_addr = blockAlign(pkt->getAddr());
+ Addr blk_addr = pkt->getBlockAddr(blkSize);
WriteQueueEntry *wq_entry =
writeBuffer.findMatch(blk_addr, pkt->isSecure());