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| author | Korey Sewell <ksewell@umich.edu> | 2006-07-07 16:19:13 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2006-07-07 16:19:13 -0400 |
| commit | e5aff1a7f326fb46c98bacbf4c9c42e0da94fe81 (patch) | |
| tree | 8856418c0d84ea13bda88fd1c3a8ad6814021616 /src/mem/cache/base_cache.cc | |
| parent | 743737c28b4d29d2b6c1a80fc14e5bc6abcf6a60 (diff) | |
| parent | 7811500eefc57d8f9f00845b9187d9a1a6ef6655 (diff) | |
| download | gem5-e5aff1a7f326fb46c98bacbf4c9c42e0da94fe81.tar.xz | |
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
into zizzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-o3
--HG--
extra : convert_revision : be8b295ebf54a7c6bf720a20ab6aa9f02aee8060
Diffstat (limited to 'src/mem/cache/base_cache.cc')
| -rw-r--r-- | src/mem/cache/base_cache.cc | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/mem/cache/base_cache.cc b/src/mem/cache/base_cache.cc index b2caca765..be9769fdc 100644 --- a/src/mem/cache/base_cache.cc +++ b/src/mem/cache/base_cache.cc @@ -59,7 +59,7 @@ void BaseCache::CachePort::getDeviceAddressRanges(AddrRangeList &resp, AddrRangeList &snoop) { - cache->getAddressRanges(resp, snoop); + cache->getAddressRanges(resp, snoop, isCpuSide); } int @@ -167,6 +167,14 @@ BaseCache::getPort(const std::string &if_name, int idx) } void +BaseCache::init() +{ + if (!cpuSidePort || !memSidePort) + panic("Cache not hooked up on both sides\n"); + cpuSidePort->sendStatusChange(Port::RangeChange); +} + +void BaseCache::regStats() { Request temp_req((Addr) NULL, 4, 0); |