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authorSteve Reinhardt <stever@eecs.umich.edu>2007-06-21 11:59:17 -0700
committerSteve Reinhardt <stever@eecs.umich.edu>2007-06-21 11:59:17 -0700
commit83af0fdcf57175adf8077c51e9ba872dd2c04b76 (patch)
tree8963225c8bb2b13973b786d615357a09f26e2226 /src/mem/cache/base_cache.cc
parentd69a763833f911cb2d7f97604108219b4da0b881 (diff)
downloadgem5-83af0fdcf57175adf8077c51e9ba872dd2c04b76.tar.xz
Getting closer...
configs/example/memtest.py: Add progress interval option. src/base/traceflags.py: Add MemTest flag. src/cpu/memtest/memtest.cc: Clean up tracing. src/cpu/memtest/memtest.hh: Get rid of unused code. --HG-- extra : convert_revision : 92bd8241a6c90bfb6d908e5a5132cbdb500cbb87
Diffstat (limited to 'src/mem/cache/base_cache.cc')
-rw-r--r--src/mem/cache/base_cache.cc6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mem/cache/base_cache.cc b/src/mem/cache/base_cache.cc
index c7006550b..8b476e100 100644
--- a/src/mem/cache/base_cache.cc
+++ b/src/mem/cache/base_cache.cc
@@ -50,8 +50,9 @@ BaseCache::CachePort::CachePort(const std::string &_name, BaseCache *_cache)
BaseCache::BaseCache(const std::string &name, Params &params)
: MemObject(name),
- mshrQueue(params.numMSHRs, 4),
- writeBuffer(params.numWriteBuffers, params.numMSHRs+1000),
+ mshrQueue(params.numMSHRs, 4, MSHRQueue_MSHRs),
+ writeBuffer(params.numWriteBuffers, params.numMSHRs+1000,
+ MSHRQueue_WriteBuffer),
blkSize(params.blkSize),
numTarget(params.numTargets),
blocked(0),
@@ -128,6 +129,7 @@ BaseCache::init()
cpuSidePort->sendStatusChange(Port::RangeChange);
}
+
void
BaseCache::regStats()
{