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authorKevin Lim <ktlim@umich.edu>2006-11-07 14:25:54 -0500
committerKevin Lim <ktlim@umich.edu>2006-11-07 14:25:54 -0500
commit8ba73da056ae8b34713dc5b927d4ceb238db969a (patch)
treed374baa289829a81a33f2e6c0f8de840cce27f8b /src/mem/cache/base_cache.hh
parent244e0c884c60c141ea1bc63bb93e0aee25d6a854 (diff)
downloadgem5-8ba73da056ae8b34713dc5b927d4ceb238db969a.tar.xz
Fix up bus draining and add draining to the caches.
src/mem/bus.cc: Fix up draining to work properly. src/mem/bus.hh: Initialize drainEvent to NULL. src/mem/cache/base_cache.cc: src/mem/cache/base_cache.hh: Add draining to the caches. --HG-- extra : convert_revision : 3082220a75d50876f10909f9f99bec535889f818
Diffstat (limited to 'src/mem/cache/base_cache.hh')
-rw-r--r--src/mem/cache/base_cache.hh33
1 files changed, 32 insertions, 1 deletions
diff --git a/src/mem/cache/base_cache.hh b/src/mem/cache/base_cache.hh
index 565280aef..ea7544fbb 100644
--- a/src/mem/cache/base_cache.hh
+++ b/src/mem/cache/base_cache.hh
@@ -105,6 +105,8 @@ class BaseCache : public MemObject
void clearBlocked();
+ bool canDrain() { return drainList.empty(); }
+
bool blocked;
bool mustSendRetry;
@@ -227,6 +229,9 @@ class BaseCache : public MemObject
/** The number of misses to trigger an exit event. */
Counter missCount;
+ /** The drain event. */
+ Event *drainEvent;
+
public:
// Statistics
/**
@@ -340,7 +345,7 @@ class BaseCache : public MemObject
BaseCache(const std::string &name, Params &params)
: MemObject(name), blocked(0), blockedSnoop(0), masterRequests(0),
slaveRequests(0), blkSize(params.blkSize),
- missCount(params.maxMisses)
+ missCount(params.maxMisses), drainEvent(NULL)
{
//Start ports at null if more than one is created we should panic
cpuSidePort = NULL;
@@ -477,6 +482,7 @@ class BaseCache : public MemObject
{
uint8_t flag = 1<<cause;
masterRequests &= ~flag;
+ checkDrain();
}
/**
@@ -512,6 +518,7 @@ class BaseCache : public MemObject
{
uint8_t flag = 1<<cause;
slaveRequests &= ~flag;
+ checkDrain();
}
/**
@@ -589,6 +596,30 @@ class BaseCache : public MemObject
return;
}
}
+
+ virtual unsigned int drain(Event *de);
+
+ void checkDrain()
+ {
+ if (drainEvent && canDrain()) {
+ drainEvent->process();
+ changeState(SimObject::Drained);
+ // Clear the drain event
+ drainEvent = NULL;
+ }
+ }
+
+ bool canDrain()
+ {
+ if (doMasterRequest() || doSlaveRequest()) {
+ return false;
+ } else if (memSidePort && !memSidePort->canDrain()) {
+ return false;
+ } else if (cpuSidePort && !cpuSidePort->canDrain()) {
+ return false;
+ }
+ return true;
+ }
};
#endif //__BASE_CACHE_HH__