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author | Steve Reinhardt <stever@eecs.umich.edu> | 2007-07-14 13:16:58 -0700 |
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committer | Steve Reinhardt <stever@eecs.umich.edu> | 2007-07-14 13:16:58 -0700 |
commit | abd194df5c2dfd0ebf608c5d59196a08ca0ef630 (patch) | |
tree | a813e2670b2b45d45cc8f350e4662069abe2ac34 /src/mem/cache/base_cache.hh | |
parent | 3b4ff759398371ac14b7d694de1c87af245f7d42 (diff) | |
download | gem5-abd194df5c2dfd0ebf608c5d59196a08ca0ef630.tar.xz |
Move a couple of DPRINTFs from Cache to CachePort.
--HG--
extra : convert_revision : 55a0d26660aeb8f63b41897d53e6b2d1f0a163be
Diffstat (limited to 'src/mem/cache/base_cache.hh')
-rw-r--r-- | src/mem/cache/base_cache.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/cache/base_cache.hh b/src/mem/cache/base_cache.hh index fcc040bd9..46414974b 100644 --- a/src/mem/cache/base_cache.hh +++ b/src/mem/cache/base_cache.hh @@ -126,7 +126,7 @@ class BaseCache : public MemObject void requestBus(RequestCause cause, Tick time) { - DPRINTF(Cache, "Asserting bus request for cause %d\n", cause); + DPRINTF(CachePort, "Asserting bus request for cause %d\n", cause); if (!waitingOnRetry) { schedSendEvent(time); } |