diff options
author | Steve Reinhardt <stever@eecs.umich.edu> | 2007-06-25 06:47:05 -0700 |
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committer | Steve Reinhardt <stever@eecs.umich.edu> | 2007-06-25 06:47:05 -0700 |
commit | 529f12a531c331e4bdcf595a3aaf65ee5ef6b72d (patch) | |
tree | c8489da2cd683b4e958fee2a33cacecacc2bd5f7 /src/mem/cache/base_cache.hh | |
parent | 47bce8ef7875420b2e26ebd834ed0d4146b65d5b (diff) | |
download | gem5-529f12a531c331e4bdcf595a3aaf65ee5ef6b72d.tar.xz |
Get rid of requestCauses. Use timestamped queue to make
sure we don't re-request bus prematurely. Use callback to
avoid calling sendRetry() recursively within recvTiming.
--HG--
extra : convert_revision : a907a2781b4b00aa8eb1ea7147afc81d6b424140
Diffstat (limited to 'src/mem/cache/base_cache.hh')
-rw-r--r-- | src/mem/cache/base_cache.hh | 42 |
1 files changed, 13 insertions, 29 deletions
diff --git a/src/mem/cache/base_cache.hh b/src/mem/cache/base_cache.hh index b35fc0811..09484a14a 100644 --- a/src/mem/cache/base_cache.hh +++ b/src/mem/cache/base_cache.hh @@ -41,6 +41,7 @@ #include <vector> #include <string> #include <list> +#include <algorithm> #include <inttypes.h> #include "base/misc.hh" @@ -105,6 +106,9 @@ class BaseCache : public MemObject bool recvRetryCommon(); + typedef EventWrapper<Port, &Port::sendRetry> + SendRetryEvent; + public: void setOtherPort(CachePort *_otherPort) { otherPort = _otherPort; } @@ -120,27 +124,12 @@ class BaseCache : public MemObject bool mustSendRetry; - /** - * Bit vector for the outstanding requests for the master interface. - */ - uint8_t requestCauses; - - bool isBusRequested() { return requestCauses != 0; } - void requestBus(RequestCause cause, Tick time) { DPRINTF(Cache, "Asserting bus request for cause %d\n", cause); - if (!isBusRequested() && !waitingOnRetry) { - assert(!sendEvent->scheduled()); - sendEvent->schedule(time); + if (!waitingOnRetry) { + schedSendEvent(time); } - requestCauses |= (1 << cause); - } - - void deassertBusRequest(RequestCause cause) - { - DPRINTF(Cache, "Deasserting bus request for cause %d\n", cause); - requestCauses &= ~(1 << cause); } void respond(PacketPtr pkt, Tick time) { @@ -163,8 +152,7 @@ class BaseCache : public MemObject MSHR *allocateBufferInternal(MSHRQueue *mq, Addr addr, int size, PacketPtr pkt, Tick time, bool requestBus) { - MSHR *mshr = mq->allocate(addr, size, pkt); - mshr->order = order++; + MSHR *mshr = mq->allocate(addr, size, pkt, time, order++); if (mq->isFull()) { setBlocked((BlockedCause)mq->index); @@ -182,9 +170,6 @@ class BaseCache : public MemObject MSHRQueue *mq = mshr->queue; bool wasFull = mq->isFull(); mq->markInService(mshr); - if (!mq->havePending()) { - deassertMemSideBusRequest((RequestCause)mq->index); - } if (wasFull && !mq->isFull()) { clearBlocked((BlockedCause)mq->index); } @@ -491,13 +476,10 @@ class BaseCache : public MemObject } } - /** - * True if the memory-side bus should be requested. - * @return True if there are outstanding requests for the master bus. - */ - bool isMemSideBusRequested() + Tick nextMSHRReadyTick() { - return memSidePort->isBusRequested(); + return std::min(mshrQueue.nextMSHRReadyTick(), + writeBuffer.nextMSHRReadyTick()); } /** @@ -516,7 +498,9 @@ class BaseCache : public MemObject */ void deassertMemSideBusRequest(RequestCause cause) { - memSidePort->deassertBusRequest(cause); + // obsolete!! + assert(false); + // memSidePort->deassertBusRequest(cause); // checkDrain(); } |