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authorCurtis Dunham <Curtis.Dunham@arm.com>2014-05-13 12:20:49 -0500
committerCurtis Dunham <Curtis.Dunham@arm.com>2014-05-13 12:20:49 -0500
commit5d029463eef3cfafa507dacadccd33402f82029a (patch)
treed2549fad3b8d6e647b0f9cf9a06887346cb65902 /src/mem/cache/blk.hh
parente3b19cb294c98466a431950888045c6b5d24b675 (diff)
downloadgem5-5d029463eef3cfafa507dacadccd33402f82029a.tar.xz
cpu, mem: Make software prefetches non-blocking
Previously, they were treated so much like loads that they could stall at the head of the ROB. Now they are always treated like L1 hits. If they actually miss, a new request is created at the L1 and tracked from the MSHRs there if necessary (i.e. if it didn't coalesce with an existing outstanding load).
Diffstat (limited to 'src/mem/cache/blk.hh')
-rw-r--r--src/mem/cache/blk.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/cache/blk.hh b/src/mem/cache/blk.hh
index d38281e48..626b4818d 100644
--- a/src/mem/cache/blk.hh
+++ b/src/mem/cache/blk.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2013 ARM Limited
+ * Copyright (c) 2012-2014 ARM Limited
* All rights reserved.
*
* The license below extends only to copyright in the software and shall