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author | Ron Dreslinski <rdreslin@umich.edu> | 2006-08-15 16:21:46 -0400 |
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committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-08-15 16:21:46 -0400 |
commit | d5ac1cb51f2e08531794e1dcbb17e47f51041c4f (patch) | |
tree | 79d49fad55c832837f4cf2a8453df72ba83d1bee /src/mem/cache/cache.hh | |
parent | d0d0d7b636c20ad0fafec885c246711ec4218fff (diff) | |
download | gem5-d5ac1cb51f2e08531794e1dcbb17e47f51041c4f.tar.xz |
Pulled out changes to fix EIO programs with caches. Also fixes any translatingPort read/write Blob function problems with caches.
-Basically removed the ASID from places it is no longer needed due to PageTable
src/mem/cache/cache.hh:
src/mem/cache/cache_impl.hh:
src/mem/cache/miss/blocking_buffer.cc:
src/mem/cache/miss/blocking_buffer.hh:
src/mem/cache/miss/miss_queue.cc:
src/mem/cache/miss/miss_queue.hh:
src/mem/cache/miss/mshr.cc:
src/mem/cache/miss/mshr.hh:
src/mem/cache/miss/mshr_queue.cc:
src/mem/cache/miss/mshr_queue.hh:
src/mem/cache/prefetch/base_prefetcher.cc:
src/mem/cache/prefetch/base_prefetcher.hh:
src/mem/cache/tags/fa_lru.cc:
src/mem/cache/tags/fa_lru.hh:
src/mem/cache/tags/iic.cc:
src/mem/cache/tags/iic.hh:
src/mem/cache/tags/lru.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.cc:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.cc:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.cc:
src/mem/cache/tags/split_lru.hh:
Remove asid where it wasn't neccesary anymore due to Page Table
--HG--
extra : convert_revision : ab8bbf4cc47b9eaefa9cdfa790881a21d0e7bf28
Diffstat (limited to 'src/mem/cache/cache.hh')
-rw-r--r-- | src/mem/cache/cache.hh | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh index a26d91709..989b8743e 100644 --- a/src/mem/cache/cache.hh +++ b/src/mem/cache/cache.hh @@ -108,7 +108,7 @@ class Cache : public BaseCache * Temporarily move a block into a MSHR. * @todo Remove this when LSQ/SB are fixed and implemented in memtest. */ - void pseudoFill(Addr addr, int asid); + void pseudoFill(Addr addr); /** * Temporarily move a block into an existing MSHR. @@ -218,7 +218,7 @@ class Cache : public BaseCache * @param asid The address space ID of the address. * @todo Is this function necessary? */ - void invalidateBlk(Addr addr, int asid); + void invalidateBlk(Addr addr); /** * Squash all requests associated with specified thread. |