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authorAndreas Hansson <andreas.hansson@arm.com>2014-10-09 17:51:56 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2014-10-09 17:51:56 -0400
commitf4a538f8624a3e07ba7a8666ed45ad9bca5e85ed (patch)
tree0d1ae68f7c9a66fb25ac37f87b246cb4889d66dd /src/mem/cache/cache.hh
parent4a453e8c95bb030d6b50cab8d42825142b093df2 (diff)
downloadgem5-f4a538f8624a3e07ba7a8666ed45ad9bca5e85ed.tar.xz
mem: Add packet sanity checks to cache and MSHRs
This patch adds a number of asserts to the cache, checking basic assumptions about packets being requests or responses.
Diffstat (limited to 'src/mem/cache/cache.hh')
-rw-r--r--src/mem/cache/cache.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh
index 12fb3b0f0..b9a9a7823 100644
--- a/src/mem/cache/cache.hh
+++ b/src/mem/cache/cache.hh
@@ -380,7 +380,7 @@ class Cache : public BaseCache
* are successfully sent.
* @param pkt The request that was sent on the bus.
*/
- void markInService(MSHR *mshr, PacketPtr pkt = 0);
+ void markInService(MSHR *mshr, PacketPtr pkt = NULL);
/**
* Return whether there are any outstanding misses.