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author | Daniel Carvalho <odanrc@yahoo.com.br> | 2019-06-01 00:01:12 +0000 |
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committer | Daniel Carvalho <odanrc@yahoo.com.br> | 2019-06-04 22:28:41 +0000 |
commit | cc6eff061c1b489c1a5f98d7fe5222837678ed2c (patch) | |
tree | 68040e97250162a8ef76631c984611fe786c9ae4 /src/mem/cache/cache.hh | |
parent | b68735f9fad5879e606849e78e1a4ad3f77f1463 (diff) | |
download | gem5-cc6eff061c1b489c1a5f98d7fe5222837678ed2c.tar.xz |
Revert "mem-cache: Remove writebacks packet list"
This reverts commit bf0a722acdd8247602e83720a5f81a0b69c76250.
Reason for revert: This patch introduces a bug:
The problem here is that the insertion of block A may cause the
eviction of block B, which on the lower level may cause the
eviction of block A. Since A is not marked as present yet, A is
"safely" removed from the snoop filter
However, by reverting it, using atomic and a Tags sub-class that
can generate multiple evictions at once becomes broken when using
Atomic mode and shall be fixed in a future patch.
Change-Id: I5b27e54b54ae5b50255588835c1a2ebf3015f002
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19088
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/mem/cache/cache.hh')
-rw-r--r-- | src/mem/cache/cache.hh | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh index d1b876e6d..33c5a2412 100644 --- a/src/mem/cache/cache.hh +++ b/src/mem/cache/cache.hh @@ -87,7 +87,8 @@ class Cache : public BaseCache */ void promoteWholeLineWrites(PacketPtr pkt); - bool access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat) override; + bool access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat, + PacketList &writebacks) override; void handleTimingReqHit(PacketPtr pkt, CacheBlk *blk, Tick request_time) override; @@ -98,9 +99,9 @@ class Cache : public BaseCache void recvTimingReq(PacketPtr pkt) override; - void doWritebacks(PacketPtr pkt, Tick forward_time) override; + void doWritebacks(PacketList& writebacks, Tick forward_time) override; - void doWritebacksAtomic(PacketPtr pkt) override; + void doWritebacksAtomic(PacketList& writebacks) override; void serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt, CacheBlk *blk) override; @@ -109,7 +110,8 @@ class Cache : public BaseCache void recvTimingSnoopResp(PacketPtr pkt) override; - Cycles handleAtomicReqMiss(PacketPtr pkt, CacheBlk *&blk) override; + Cycles handleAtomicReqMiss(PacketPtr pkt, CacheBlk *&blk, + PacketList &writebacks) override; Tick recvAtomic(PacketPtr pkt) override; |