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authorGabe Black <gblack@eecs.umich.edu>2006-10-20 16:39:47 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-10-20 16:39:47 -0400
commit0b5cf4ba6eb2702ade2bc77c07842edd97eab264 (patch)
tree4e1ed8130794049e771759059269e6dc23848180 /src/mem/cache/cache_builder.cc
parent76c07ea46bc4f8f6d500f909abfb07addf217940 (diff)
parent6c6b78126a38cf92eef89f027312e1c7a063bd18 (diff)
downloadgem5-0b5cf4ba6eb2702ade2bc77c07842edd97eab264.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into zeep.eecs.umich.edu:/home/gblack/m5/newmem --HG-- extra : convert_revision : 2711fec2bf72801999b060e65f0bf744c18734fb
Diffstat (limited to 'src/mem/cache/cache_builder.cc')
-rw-r--r--src/mem/cache/cache_builder.cc4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mem/cache/cache_builder.cc b/src/mem/cache/cache_builder.cc
index 05a149a1c..03646ec2a 100644
--- a/src/mem/cache/cache_builder.cc
+++ b/src/mem/cache/cache_builder.cc
@@ -113,7 +113,6 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(BaseCache)
Param<bool> prioritizeRequests;
// SimObjectParam<Bus *> in_bus;
// SimObjectParam<Bus *> out_bus;
- Param<bool> do_copy;
SimObjectParam<CoherenceProtocol *> protocol;
Param<Addr> trace_addr;
Param<int> hash_delay;
@@ -163,7 +162,6 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(BaseCache)
/* INIT_PARAM_DFLT(in_bus, "incoming bus object", NULL),
INIT_PARAM(out_bus, "outgoing bus object"),
*/
- INIT_PARAM_DFLT(do_copy, "perform fast copies in the cache", false),
INIT_PARAM_DFLT(protocol, "coherence protocol to use in the cache", NULL),
INIT_PARAM_DFLT(trace_addr, "address to trace", 0),
@@ -228,7 +226,7 @@ END_INIT_SIM_OBJECT_PARAMS(BaseCache)
BUILD_NULL_PREFETCHER(t, comp, b); \
} \
Cache<CacheTags<t, comp>, b, c>::Params params(tagStore, mq, coh, \
- do_copy, base_params, \
+ base_params, \
/*in_bus, out_bus,*/ pf, \
prefetch_access, hit_latency); \
Cache<CacheTags<t, comp>, b, c> *retval = \