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| author | Ron Dreslinski <rdreslin@umich.edu> | 2006-08-15 14:28:22 -0400 |
|---|---|---|
| committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-08-15 14:28:22 -0400 |
| commit | d0d0d7b636c20ad0fafec885c246711ec4218fff (patch) | |
| tree | 59305895276c854e0055796c3ce4b134761ae5e3 /src/mem/cache/cache_impl.hh | |
| parent | 07488510713a1df61f6cefced7677047cfc0ef66 (diff) | |
| parent | dc375e42bc739e8869a75993a93ed8afc3f294cc (diff) | |
| download | gem5-d0d0d7b636c20ad0fafec885c246711ec4218fff.tar.xz | |
Merge zizzer:/z/m5/Bitkeeper/newmem
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/newmem
--HG--
extra : convert_revision : 8a8d7fe59610806015c8242a2f5eacf9afce7164
Diffstat (limited to 'src/mem/cache/cache_impl.hh')
| -rw-r--r-- | src/mem/cache/cache_impl.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index 56e7a4d58..b215960c4 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -69,7 +69,7 @@ doTimingAccess(Packet *pkt, CachePort *cachePort, bool isCpuSide) else snoop(pkt); } - return true; //Deal with blocking.... + return true; } template<class TagStore, class Buffering, class Coherence> |