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authorSteve Reinhardt <stever@eecs.umich.edu>2006-10-19 00:33:33 -0700
committerSteve Reinhardt <stever@eecs.umich.edu>2006-10-19 00:33:33 -0700
commitbba3dfb0d3f3ee15ddb5261d0b57c789b42a6925 (patch)
tree3bed97b47bbf09931848c5ca3d37e797461f69ee /src/mem/cache/cache_impl.hh
parent75ecd3be60d81fca759d34d9c8f0e4f500652aee (diff)
downloadgem5-bba3dfb0d3f3ee15ddb5261d0b57c789b42a6925.tar.xz
First cut at LL/SC support in caches (atomic mode only).
configs/example/fs.py: Add MOESI protocol to caches (uni coherence not quite working w/FS yet). --HG-- extra : convert_revision : 7bef7d9c5b24bf7241cc810df692408837b06b86
Diffstat (limited to 'src/mem/cache/cache_impl.hh')
-rw-r--r--src/mem/cache/cache_impl.hh10
1 files changed, 0 insertions, 10 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 520e5abb5..214a495e0 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -86,11 +86,6 @@ doAtomicAccess(Packet *pkt, bool isCpuSide)
{
if (isCpuSide)
{
- //Temporary solution to LL/SC
- if (pkt->isWrite() && (pkt->req->isLocked())) {
- pkt->req->setScResult(1);
- }
-
probe(pkt, true, NULL);
//TEMP ALWAYS SUCCES FOR NOW
pkt->result = Packet::Success;
@@ -116,11 +111,6 @@ doFunctionalAccess(Packet *pkt, bool isCpuSide)
//TEMP USE CPU?THREAD 0 0
pkt->req->setThreadContext(0,0);
- //Temporary solution to LL/SC
- if (pkt->isWrite() && (pkt->req->isLocked())) {
- assert("Can't handle LL/SC on functional path\n");
- }
-
probe(pkt, false, memSidePort);
//TEMP ALWAYS SUCCESFUL FOR NOW
pkt->result = Packet::Success;