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authorGabe Black <gblack@eecs.umich.edu>2006-10-16 15:56:53 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-10-16 15:56:53 -0400
commit519d11bab32e0ec4cf73f3b1c80f0e77a43155d2 (patch)
treeb9bdd19e2f2aa2698da47d82615d4b5d864eb8cc /src/mem/cache/cache_impl.hh
parentf1661baf30faf76dbad7d23aeac0c3dbe4dd045c (diff)
parent9202422d6ebb7a17936bee1b9aaa427541156d13 (diff)
downloadgem5-519d11bab32e0ec4cf73f3b1c80f0e77a43155d2.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into zeep.eecs.umich.edu:/home/gblack/m5/newmem --HG-- extra : convert_revision : 898976bbd322e55bc234035456df8090c6dcf72d
Diffstat (limited to 'src/mem/cache/cache_impl.hh')
-rw-r--r--src/mem/cache/cache_impl.hh14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index a68418f24..9db79b843 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -151,12 +151,7 @@ Cache(const std::string &_name,
doCopy(params.doCopy), blockOnCopy(params.blockOnCopy),
hitLatency(params.hitLatency)
{
-//FIX BUS POINTERS
-// if (params.in == NULL) {
- topLevelCache = true;
-// }
-//PLEASE FIX THIS, BUS SIZES NOT BEING USED
- tags->setCache(this, blkSize, 1/*params.out->width, params.out->clockRate*/);
+ tags->setCache(this);
tags->setPrefetcher(prefetcher);
missQueue->setCache(this);
missQueue->setPrefetcher(prefetcher);
@@ -389,10 +384,15 @@ template<class TagStore, class Buffering, class Coherence>
void
Cache<TagStore,Buffering,Coherence>::snoop(Packet * &pkt)
{
+ if (pkt->req->isUncacheable()) {
+ //Can't get a hit on an uncacheable address
+ //Revisit this for multi level coherence
+ return;
+ }
Addr blk_addr = pkt->getAddr() & ~(Addr(blkSize-1));
BlkType *blk = tags->findBlock(pkt);
MSHR *mshr = missQueue->findMSHR(blk_addr);
- if (isTopLevel() && coherence->hasProtocol()) { //@todo Move this into handle bus req
+ if (coherence->hasProtocol()) { //@todo Move this into handle bus req
//If we find an mshr, and it is in service, we need to NACK or invalidate
if (mshr) {
if (mshr->inService) {