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author | Andreas Hansson <andreas.hansson@arm.com> | 2012-05-30 05:30:24 -0400 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-05-30 05:30:24 -0400 |
commit | 5880fbe96dea23c7b036e2ff9c7dcb4d206402ad (patch) | |
tree | 785c3b7599f6a2178e8dc3ef67e1c052ef7f937f /src/mem/cache/cache_impl.hh | |
parent | cad802761a876c6dcd00d58e09c8984886c987f6 (diff) | |
download | gem5-5880fbe96dea23c7b036e2ff9c7dcb4d206402ad.tar.xz |
Bus: Turn the PortId into a transport function parameter
The main aim of this patch is to arrive at a suitable port interface
for vector ports, including both the packet and the port id. This
patch changes the bus transport functions
(recvFunctional/Atomic/Timing) to require a PortId parameter
indicating the source port. Previously this information was passed by
setting the source field of the packet, and this is only required in
the case of a timing request.
With this patch, the use of the source and destination field is also
more restrictive, as they are only needed for timing accesses. The
modifications to these fields for atomic snoops is now removed
entirely, also making minor modifications to the cache.
Diffstat (limited to 'src/mem/cache/cache_impl.hh')
-rw-r--r-- | src/mem/cache/cache_impl.hh | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index c7eb3f80b..3b9bfd35a 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -1193,14 +1193,12 @@ Cache<TagStore>::handleSnoop(PacketPtr pkt, BlkType *blk, pkt->assertShared(); } } else { - PortID origSrc = pkt->getSrc(); cpuSidePort->sendAtomicSnoop(pkt); if (!alreadyResponded && pkt->memInhibitAsserted()) { // cache-to-cache response from some upper cache: // forward response to original requester assert(pkt->isResponse()); } - pkt->setSrc(origSrc); } } |