MEM: Separate queries for snooping and address ranges

This patch simplifies the address-range determination mechanism and
also unifies the naming across ports and devices. It further splits
the queries for determining if a port is snooping and what address
ranges it responds to (aiming towards a separation of
cache-maintenance ports and pure memory-mapped ports). Default
behaviours are such that most ports do not have to define isSnooping,
and master ports need not implement getAddrRanges.

1 files changed, 8 insertions, 8 deletions

diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 1e5b59e17..46692a8d3 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -1554,14 +1554,15 @@ Cache<TagStore>::nextMSHRReadyTime()
 ///////////////
 
 template<class TagStore>
-void
+AddrRangeList
 Cache<TagStore>::CpuSidePort::
-getDeviceAddressRanges(AddrRangeList &resp, bool &snoop)
+getAddrRanges()
 {
     // CPU side port doesn't snoop; it's a target only.  It can
     // potentially respond to any address.
-    snoop = false;
-    resp.push_back(myCache()->getAddrRange());
+    AddrRangeList ranges;
+    ranges.push_back(myCache()->getAddrRange());
+    return ranges;
 }
 
 
@@ -1612,14 +1613,13 @@ CpuSidePort::CpuSidePort(const std::string &_name, Cache<TagStore> *_cache,
 ///////////////
 
 template<class TagStore>
-void
-Cache<TagStore>::MemSidePort::
-getDeviceAddressRanges(AddrRangeList &resp, bool &snoop)
+bool
+Cache<TagStore>::MemSidePort::isSnooping()
 {
     // Memory-side port always snoops, but never passes requests
     // through to targets on the cpu side (so we don't add anything to
     // the address range list).
-    snoop = true;
+    return true;
 }