diff options
| author | Dam Sunwoo <dam.sunwoo@arm.com> | 2012-06-29 11:19:07 -0400 |
|---|---|---|
| committer | Dam Sunwoo <dam.sunwoo@arm.com> | 2012-06-29 11:19:07 -0400 |
| commit | 7cbe0cf5646120f8e4bca388d6eb487dff2632c9 (patch) | |
| tree | 11c76c754962206805962ee529ea84c812f9ec31 /src/mem/cache/cache_impl.hh | |
| parent | 234fd1c4d8822169b3cfc7beaeff79ad8e471f5c (diff) | |
| download | gem5-7cbe0cf5646120f8e4bca388d6eb487dff2632c9.tar.xz | |
Mem: fix master id assertion in cache_impl.hh
The assertion was applied to the wrong packet.
This patch fixes the issue rerported by Xiang Jiang on the gem5-dev mailing list.
Diffstat (limited to 'src/mem/cache/cache_impl.hh')
| -rw-r--r-- | src/mem/cache/cache_impl.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index 2329b2ea6..af32346bb 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -903,7 +903,7 @@ Cache<TagStore>::handleResponse(PacketPtr pkt) assert(!target->pkt->req->isUncacheable()); - assert(pkt->req->masterId() < system->maxMasters()); + assert(target->pkt->req->masterId() < system->maxMasters()); missLatency[target->pkt->cmdToIndex()][target->pkt->req->masterId()] += completion_time - target->recvTime; } else if (pkt->cmd == MemCmd::UpgradeFailResp) { |