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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2007-05-22 07:30:55 -0700 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2007-05-22 07:30:55 -0700 |
| commit | da46364b1878339841e9cda5a62ee104409b6535 (patch) | |
| tree | 1311700952d1509f08e8ac55a60d7467fba2b22c /src/mem/cache/cache_impl.hh | |
| parent | 0484867d85da6c1f97c5e1c55056cf48b6b7c37d (diff) | |
| download | gem5-da46364b1878339841e9cda5a62ee104409b6535.tar.xz | |
Fix getDeviceAddressRanges() to get snooping right.
--HG--
extra : convert_revision : 2aeab25ef955ab9db7b968786faff227239fbbe4
Diffstat (limited to 'src/mem/cache/cache_impl.hh')
| -rw-r--r-- | src/mem/cache/cache_impl.hh | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index 56352c110..a7f96603e 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -1140,6 +1140,18 @@ Cache<TagStore,Coherence>::deletePortRefs(Port *p) template<class TagStore, class Coherence> +void +Cache<TagStore,Coherence>::CpuSidePort:: +getDeviceAddressRanges(AddrRangeList &resp, bool &snoop) +{ + // CPU side port doesn't snoop; it's a target only. + bool dummy; + otherPort->getPeerAddressRanges(resp, dummy); + snoop = false; +} + + +template<class TagStore, class Coherence> bool Cache<TagStore,Coherence>::CpuSidePort::recvTiming(PacketPtr pkt) { @@ -1261,6 +1273,18 @@ Cache<TagStore,Coherence>::CpuSidePort::recvFunctional(PacketPtr pkt) template<class TagStore, class Coherence> +void +Cache<TagStore,Coherence>::MemSidePort:: +getDeviceAddressRanges(AddrRangeList &resp, bool &snoop) +{ + // Memory-side port always snoops. + bool dummy; + otherPort->getPeerAddressRanges(resp, dummy); + snoop = true; +} + + +template<class TagStore, class Coherence> bool Cache<TagStore,Coherence>::MemSidePort::recvTiming(PacketPtr pkt) { |