add uglyiness to fix dmas

src/dev/io_device.cc:
    extra printing and assertions
src/mem/bridge.hh:
    deal with packets only satisfying part of a request by making many requests
src/mem/cache/cache_impl.hh:
    make the cache try to satisfy a functional request from the cache above it before checking itself

--HG--
extra : convert_revision : 1df52ab61d7967e14cc377c560495430a6af266a

1 files changed, 3 insertions, 3 deletions

diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index c70f10151..db488d33d 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -1290,9 +1290,9 @@ template<class TagStore, class Coherence>
 void
 Cache<TagStore,Coherence>::MemSidePort::recvFunctional(PacketPtr pkt)
 {
-    if (checkFunctional(pkt)) {
-        myCache()->probe(pkt, false, cache->cpuSidePort);
-    }
+    myCache()->probe(pkt, false, cache->cpuSidePort);
+    if (pkt->result != Packet::Success)
+        checkFunctional(pkt);
 }