diff options
author | Ron Dreslinski <rdreslin@umich.edu> | 2006-10-12 14:21:25 -0400 |
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committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-10-12 14:21:25 -0400 |
commit | fe230ddb8ff2f3339ffaa20d30c01bb5b00185b6 (patch) | |
tree | 53bdcaa40d559a0a7eabad0656a2b257f34f963e /src/mem/cache/cache_impl.hh | |
parent | f89b56b61ad9cb4605d0c3297b5d563672812ce9 (diff) | |
download | gem5-fe230ddb8ff2f3339ffaa20d30c01bb5b00185b6.tar.xz |
Remove bus and top level parameters from cache
src/mem/cache/base_cache.hh:
Remove top level param from cache
src/mem/cache/coherence/uni_coherence.cc:
Remove top level parameters from the cache
--HG--
extra : convert_revision : 4437aeedc20866869de7f9ab123dfa7baeebedf0
Diffstat (limited to 'src/mem/cache/cache_impl.hh')
-rw-r--r-- | src/mem/cache/cache_impl.hh | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index 150abbe52..9db79b843 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -151,12 +151,7 @@ Cache(const std::string &_name, doCopy(params.doCopy), blockOnCopy(params.blockOnCopy), hitLatency(params.hitLatency) { -//FIX BUS POINTERS -// if (params.in == NULL) { - topLevelCache = true; -// } -//PLEASE FIX THIS, BUS SIZES NOT BEING USED - tags->setCache(this, blkSize, 1/*params.out->width, params.out->clockRate*/); + tags->setCache(this); tags->setPrefetcher(prefetcher); missQueue->setCache(this); missQueue->setPrefetcher(prefetcher); @@ -397,7 +392,7 @@ Cache<TagStore,Buffering,Coherence>::snoop(Packet * &pkt) Addr blk_addr = pkt->getAddr() & ~(Addr(blkSize-1)); BlkType *blk = tags->findBlock(pkt); MSHR *mshr = missQueue->findMSHR(blk_addr); - if (isTopLevel() && coherence->hasProtocol()) { //@todo Move this into handle bus req + if (coherence->hasProtocol()) { //@todo Move this into handle bus req //If we find an mshr, and it is in service, we need to NACK or invalidate if (mshr) { if (mshr->inService) { |