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authorAndreas Hansson <andreas.hansson@arm.com>2012-05-30 05:29:42 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2012-05-30 05:29:42 -0400
commitcad802761a876c6dcd00d58e09c8984886c987f6 (patch)
treefcb327a8923631de61133c6ad14aeaffcc44761c /src/mem/cache/cache_impl.hh
parent6a54f7fc5ff1c33bc9f222014dc08c33248b0299 (diff)
downloadgem5-cad802761a876c6dcd00d58e09c8984886c987f6.tar.xz
Packet: Unify the use of PortID in packet and port
This patch removes the Packet::NodeID typedef and unifies it with the Port::PortId. The src and dest fields in the packet are used to hold a port id (e.g. in the bus), and thus the two should actually be the same. The typedef PortID is now global (in base/types.hh) and aligned with the ThreadID in terms of capitalisation and naming of the InvalidPortID constant. Before this patch, two flags were used for valid destination and source, rather than relying on a named value (InvalidPortID), and this is now redundant, as the src and dest field themselves are sufficient to tell whether the current value is a valid port identifier or not. Consequently, the VALID_SRC and VALID_DST are removed. As part of the cleaning up, a number of int parameters and local variables are updated to use PortID. Note that Ruby still has its own NodeID typedef. Furthermore, the MemObject getMaster/SlavePort still has an int idx parameter with a default value of -1 which should eventually change to PortID idx = InvalidPortID.
Diffstat (limited to 'src/mem/cache/cache_impl.hh')
-rw-r--r--src/mem/cache/cache_impl.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index d9e06c022..c7eb3f80b 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -352,7 +352,7 @@ Cache<TagStore>::access(PacketPtr pkt, BlkType *&blk,
class ForwardResponseRecord : public Packet::SenderState, public FastAlloc
{
Packet::SenderState *prevSenderState;
- Packet::NodeID prevSrc;
+ PortID prevSrc;
#ifndef NDEBUG
BaseCache *cache;
#endif
@@ -1193,7 +1193,7 @@ Cache<TagStore>::handleSnoop(PacketPtr pkt, BlkType *blk,
pkt->assertShared();
}
} else {
- Packet::NodeID origSrc = pkt->getSrc();
+ PortID origSrc = pkt->getSrc();
cpuSidePort->sendAtomicSnoop(pkt);
if (!alreadyResponded && pkt->memInhibitAsserted()) {
// cache-to-cache response from some upper cache: