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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2012-03-09 09:59:25 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2012-03-09 09:59:25 -0500 |
| commit | eaa994e7f6c12f6dc3e17836052f76a5ce9bdc01 (patch) | |
| tree | d24450f54631a6e82b3c01b93fcf9e698eeee708 /src/mem/cache/cache_impl.hh | |
| parent | cda4c2d280e9c1becf3b4d0b6b384f63641c45ba (diff) | |
| download | gem5-eaa994e7f6c12f6dc3e17836052f76a5ce9bdc01.tar.xz | |
cache: Allow main memory to be at disjoint address ranges.
Diffstat (limited to 'src/mem/cache/cache_impl.hh')
| -rw-r--r-- | src/mem/cache/cache_impl.hh | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index 024ae3297..f6efc3fb8 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -1556,9 +1556,7 @@ template<class TagStore> AddrRangeList Cache<TagStore>::CpuSidePort::getAddrRanges() { - AddrRangeList ranges; - ranges.push_back(cache->getAddrRange()); - return ranges; + return cache->getAddrRanges(); } template<class TagStore> |