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authorSteve Reinhardt <stever@gmail.com>2008-03-15 05:03:55 -0700
committerSteve Reinhardt <stever@gmail.com>2008-03-15 05:03:55 -0700
commit19c367fa8fa0c330676c1b7aacb532b8871164cf (patch)
treefa35ab888aa243bd78012219e0f60bbbd4bc7717 /src/mem/cache/cache_impl.hh
parent969688154d6283648be85d359710f1af326ffe3a (diff)
downloadgem5-19c367fa8fa0c330676c1b7aacb532b8871164cf.tar.xz
Fix subtle cache bug where read could return stale data
if a prior write miss arrived while an even earlier read miss was still outstanding. --HG-- extra : convert_revision : 4924e145829b2ecf4610b88d33f4773510c6801a
Diffstat (limited to 'src/mem/cache/cache_impl.hh')
-rw-r--r--src/mem/cache/cache_impl.hh4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index e546e2a9a..5aecea7d5 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -825,6 +825,10 @@ Cache<TagStore>::handleResponse(PacketPtr pkt)
}
if (mshr->promoteDeferredTargets()) {
+ assert(mshr->needsExclusive() && !blk->isWritable());
+ // avoid later read getting stale data while write miss is
+ // outstanding.. see comment in timingAccess()
+ blk->status &= ~BlkReadable;
MSHRQueue *mq = mshr->queue;
mq->markPending(mshr);
requestMemSideBus((RequestCause)mq->index, pkt->finishTime);