Remove bus and top level parameters from cache

src/mem/cache/base_cache.hh:
    Remove top level param from cache
src/mem/cache/coherence/uni_coherence.cc:
    Remove top level parameters from the cache

--HG--
extra : convert_revision : 4437aeedc20866869de7f9ab123dfa7baeebedf0

1 files changed, 6 insertions, 8 deletions

diff --git a/src/mem/cache/coherence/uni_coherence.cc b/src/mem/cache/coherence/uni_coherence.cc
index 5ab706269..0efe393f9 100644
--- a/src/mem/cache/coherence/uni_coherence.cc
+++ b/src/mem/cache/coherence/uni_coherence.cc
@@ -68,14 +68,12 @@ UniCoherence::handleBusRequest(Packet * &pkt, CacheBlk *blk, MSHR *mshr,
     if (pkt->isInvalidate()) {
         DPRINTF(Cache, "snoop inval on blk %x (blk ptr %x)\n",
                 pkt->getAddr(), blk);
-        if (!cache->isTopLevel()) {
-            // Forward to other caches
-            Packet * tmp = new Packet(pkt->req, Packet::InvalidateReq, -1);
-            cshrs.allocate(tmp);
-            cache->setSlaveRequest(Request_Coherence, curTick);
-            if (cshrs.isFull()) {
-                cache->setBlockedForSnoop(Blocked_Coherence);
-            }
+        // Forward to other caches
+        Packet * tmp = new Packet(pkt->req, Packet::InvalidateReq, -1);
+        cshrs.allocate(tmp);
+        cache->setSlaveRequest(Request_Coherence, curTick);
+        if (cshrs.isFull()) {
+            cache->setBlockedForSnoop(Blocked_Coherence);
         }
     } else {
         if (blk) {