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author | Daniel R. Carvalho <odanrc@yahoo.com.br> | 2018-05-29 17:30:29 +0200 |
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committer | Daniel Carvalho <odanrc@yahoo.com.br> | 2019-05-08 17:41:09 +0000 |
commit | 0e276f6512cac540ab546baf02fd931b7181d55b (patch) | |
tree | 1700003bb3f09b7612e18277f371f1ef88467fa2 /src/mem/cache/compressors | |
parent | f21f4a049e02df58dfb1cb3e651ced276f03c4ba (diff) | |
download | gem5-0e276f6512cac540ab546baf02fd931b7181d55b.tar.xz |
mem-cache: Add compression stats
Add compression statistics to the compressors. It tracks
the number of blocks that can fit into a certain power
of two size, and the number of decompressions.
For example, if a block is compressed to 100 bits, it will
belong to the 128-bits compression size. Although it could
also fit bigger sizes, they are not taken into account for
the stats (i.e., the 100-bit compression will fit only the
128-bits size, not 256 or higher).
We save stats for compressions that fail (i.e., compressed
size is bigger than original cache line size).
Change-Id: Idab71a40a660e33259908ccd880e42a880b5ee06
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/11103
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/mem/cache/compressors')
-rw-r--r-- | src/mem/cache/compressors/base.cc | 24 | ||||
-rw-r--r-- | src/mem/cache/compressors/base.hh | 18 |
2 files changed, 42 insertions, 0 deletions
diff --git a/src/mem/cache/compressors/base.cc b/src/mem/cache/compressors/base.cc index 2991dfeda..1ba2677ea 100644 --- a/src/mem/cache/compressors/base.cc +++ b/src/mem/cache/compressors/base.cc @@ -36,6 +36,7 @@ #include <algorithm> #include <cstdint> +#include <string> #include "debug/CacheComp.hh" #include "mem/cache/tags/super_blk.hh" @@ -100,6 +101,9 @@ BaseCacheCompressor::compress(const uint64_t* data, Cycles& comp_lat, // Get compression size comp_size_bits = comp_data->getSizeBits(); + // Update stats + compressionSize[std::ceil(std::log2(comp_size_bits))]++; + // Print debug information DPRINTF(CacheComp, "Compressed cache line from %d to %d bits. " \ "Compression latency: %llu, decompression latency: %llu\n", @@ -140,3 +144,23 @@ BaseCacheCompressor::setSizeBits(CacheBlk* blk, const std::size_t size_bits) static_cast<CompressionBlk*>(blk)->setSizeBits(size_bits); } +void +BaseCacheCompressor::regStats() +{ + SimObject::regStats(); + + // We also store when compression is bigger than original block size + compressionSize + .init(std::log2(blkSize*8) + 2) + .name(name() + ".compression_size") + .desc("Number of blocks that were compressed to this power of" \ + "two size.") + ; + + for (unsigned i = 0; i <= std::log2(blkSize*8) + 1; ++i) { + compressionSize.subname(i, std::to_string(1 << i)); + compressionSize.subdesc(i, "Number of blocks that compressed to fit " \ + "in " + std::to_string(1 << i) + " bits"); + } +} + diff --git a/src/mem/cache/compressors/base.hh b/src/mem/cache/compressors/base.hh index 1a8c82c9b..a19a0727a 100644 --- a/src/mem/cache/compressors/base.hh +++ b/src/mem/cache/compressors/base.hh @@ -40,6 +40,7 @@ #include <cstdint> +#include "base/statistics.hh" #include "base/types.hh" #include "sim/sim_object.hh" @@ -64,6 +65,18 @@ class BaseCacheCompressor : public SimObject { const std::size_t blkSize; /** + * @defgroup CompressionStats Compression specific statistics. + * @{ + */ + + /** Number of blocks that were compressed to this power of two size. */ + Stats::Vector compressionSize; + + /** + * @} + */ + + /** * Apply the compression process to the cache line. * Returns the number of cycles used by the compressor, however it is * usually covered by a good pipelined execution, and is currently ignored. @@ -136,6 +149,11 @@ class BaseCacheCompressor : public SimObject { * @param size_bits The block size. */ static void setSizeBits(CacheBlk* blk, const std::size_t size_bits); + + /** + * Register local statistics. + */ + void regStats() override; }; class BaseCacheCompressor::CompressionData { |