Pulled out changes to fix EIO programs with caches. Also fixes any translatingPort read/write Blob function problems with caches.

-Basically removed the ASID from places it is no longer needed due to PageTable

src/mem/cache/cache.hh:
src/mem/cache/cache_impl.hh:
src/mem/cache/miss/blocking_buffer.cc:
src/mem/cache/miss/blocking_buffer.hh:
src/mem/cache/miss/miss_queue.cc:
src/mem/cache/miss/miss_queue.hh:
src/mem/cache/miss/mshr.cc:
src/mem/cache/miss/mshr.hh:
src/mem/cache/miss/mshr_queue.cc:
src/mem/cache/miss/mshr_queue.hh:
src/mem/cache/prefetch/base_prefetcher.cc:
src/mem/cache/prefetch/base_prefetcher.hh:
src/mem/cache/tags/fa_lru.cc:
src/mem/cache/tags/fa_lru.hh:
src/mem/cache/tags/iic.cc:
src/mem/cache/tags/iic.hh:
src/mem/cache/tags/lru.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.cc:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.cc:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.cc:
src/mem/cache/tags/split_lru.hh:
    Remove asid where it wasn't neccesary anymore due to Page Table

--HG--
extra : convert_revision : ab8bbf4cc47b9eaefa9cdfa790881a21d0e7bf28

1 files changed, 3 insertions, 3 deletions

diff --git a/src/mem/cache/miss/blocking_buffer.cc b/src/mem/cache/miss/blocking_buffer.cc
index 2f61e8a54..67fc7ae56 100644
--- a/src/mem/cache/miss/blocking_buffer.cc
+++ b/src/mem/cache/miss/blocking_buffer.cc
@@ -76,7 +76,7 @@ BlockingBuffer::handleMiss(Packet * &pkt, int blk_size, Tick time)
         if (!pkt->needsResponse()) {
             wb.allocateAsBuffer(pkt);
         } else {
-            wb.allocate(pkt->cmd, blk_addr, pkt->req->getAsid(), blk_size, pkt);
+            wb.allocate(pkt->cmd, blk_addr, blk_size, pkt);
         }
 
         memcpy(wb.pkt->getPtr<uint8_t>(), pkt->getPtr<uint8_t>(), blk_size);
@@ -89,7 +89,7 @@ BlockingBuffer::handleMiss(Packet * &pkt, int blk_size, Tick time)
     if (!pkt->needsResponse()) {
         miss.allocateAsBuffer(pkt);
     } else {
-        miss.allocate(pkt->cmd, blk_addr, pkt->req->getAsid(), blk_size, pkt);
+        miss.allocate(pkt->cmd, blk_addr, blk_size, pkt);
     }
     if (!pkt->req->isUncacheable()) {
         miss.pkt->flags |= CACHE_LINE_FILL;
@@ -202,7 +202,7 @@ BlockingBuffer::squash(int threadNum)
 }
 
 void
-BlockingBuffer::doWriteback(Addr addr, int asid,
+BlockingBuffer::doWriteback(Addr addr,
                             int size, uint8_t *data, bool compressed)
 {
     // Generate request