Pulled out changes to fix EIO programs with caches. Also fixes any translatingPort read/write Blob function problems with caches.

-Basically removed the ASID from places it is no longer needed due to PageTable

src/mem/cache/cache.hh:
src/mem/cache/cache_impl.hh:
src/mem/cache/miss/blocking_buffer.cc:
src/mem/cache/miss/blocking_buffer.hh:
src/mem/cache/miss/miss_queue.cc:
src/mem/cache/miss/miss_queue.hh:
src/mem/cache/miss/mshr.cc:
src/mem/cache/miss/mshr.hh:
src/mem/cache/miss/mshr_queue.cc:
src/mem/cache/miss/mshr_queue.hh:
src/mem/cache/prefetch/base_prefetcher.cc:
src/mem/cache/prefetch/base_prefetcher.hh:
src/mem/cache/tags/fa_lru.cc:
src/mem/cache/tags/fa_lru.hh:
src/mem/cache/tags/iic.cc:
src/mem/cache/tags/iic.hh:
src/mem/cache/tags/lru.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.cc:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.cc:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.cc:
src/mem/cache/tags/split_lru.hh:
    Remove asid where it wasn't neccesary anymore due to Page Table

--HG--
extra : convert_revision : ab8bbf4cc47b9eaefa9cdfa790881a21d0e7bf28

1 files changed, 5 insertions, 5 deletions

diff --git a/src/mem/cache/miss/blocking_buffer.hh b/src/mem/cache/miss/blocking_buffer.hh
index a6261f62c..641d5a798 100644
--- a/src/mem/cache/miss/blocking_buffer.hh
+++ b/src/mem/cache/miss/blocking_buffer.hh
@@ -121,7 +121,7 @@ public:
      * @param time The time the miss is detected.
      * @param target The target for the fetch.
      */
-    MSHR* fetchBlock(Addr addr, int asid, int blk_size, Tick time,
+    MSHR* fetchBlock(Addr addr, int blk_size, Tick time,
                      Packet * &target)
     {
         fatal("Unimplemented");
@@ -183,7 +183,7 @@ public:
      * @param asid The address space id.
      * @return A pointer to miss if it matches.
      */
-    MSHR* findMSHR(Addr addr, int asid)
+    MSHR* findMSHR(Addr addr)
     {
         if (miss.addr == addr && miss.pkt)
             return &miss;
@@ -197,7 +197,7 @@ public:
      * @param writes List of pointers to the matching writes.
      * @return True if there is a matching write.
      */
-    bool findWrites(Addr addr, int asid, std::vector<MSHR*>& writes)
+    bool findWrites(Addr addr, std::vector<MSHR*>& writes)
     {
         if (wb.addr == addr && wb.pkt) {
             writes.push_back(&wb);
@@ -216,7 +216,7 @@ public:
      * @param data The data to write, can be NULL.
      * @param compressed True if the data is compressed.
      */
-    void doWriteback(Addr addr, int asid,
+    void doWriteback(Addr addr,
                      int size, uint8_t *data, bool compressed);
 
     /**
@@ -247,7 +247,7 @@ public:
     /**
      * Dummy implmentation.
      */
-    MSHR* allocateTargetList(Addr addr, int asid)
+    MSHR* allocateTargetList(Addr addr)
     {
         fatal("Unimplemented");
     }