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authorNathan Binkert <binkertn@umich.edu>2007-03-06 11:13:43 -0800
committerNathan Binkert <binkertn@umich.edu>2007-03-06 11:13:43 -0800
commitd55b25cde6d2c072885a2c468d209fb18d6628e6 (patch)
tree391c4e66a69818a95037a5f2adccb2e8e0c84648 /src/mem/cache/miss/mshr.cc
parentf800fddcea850822efee031b9b904280639da4c6 (diff)
downloadgem5-d55b25cde6d2c072885a2c468d209fb18d6628e6.tar.xz
Move all of the parameters of the Root SimObject so they are
directly configured by python. Move stuff from root.(cc|hh) to core.(cc|hh) since it really belogs there now. In the process, simplify how ticks are used in the python code. --HG-- extra : convert_revision : cf82ee1ea20f9343924f30bacc2a38d4edee8df3
Diffstat (limited to 'src/mem/cache/miss/mshr.cc')
-rw-r--r--src/mem/cache/miss/mshr.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/cache/miss/mshr.cc b/src/mem/cache/miss/mshr.cc
index 352d1ec6f..74dad658b 100644
--- a/src/mem/cache/miss/mshr.cc
+++ b/src/mem/cache/miss/mshr.cc
@@ -39,7 +39,7 @@
#include <vector>
#include "mem/cache/miss/mshr.hh"
-#include "sim/root.hh" // for curTick
+#include "sim/core.hh" // for curTick
#include "sim/host.hh"
#include "base/misc.hh"
#include "mem/cache/cache.hh"