summaryrefslogtreecommitdiff
path: root/src/mem/cache/miss/mshr.hh
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2006-08-15 05:08:30 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-08-15 05:08:30 -0400
commitcd6eb5396569bd2a3b16148f0d5277f7f4ee1391 (patch)
treef587628bf43f6374ca351c295116b8b70fc90aee /src/mem/cache/miss/mshr.hh
parent74546aac0124a5ba09a0e6bfef18dc3e0b7509b8 (diff)
parentc9900f159e8d2fd7e32070e2cd0971caf917431d (diff)
downloadgem5-cd6eb5396569bd2a3b16148f0d5277f7f4ee1391.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into ewok.(none):/home/gblack/m5/newmem src/cpu/static_inst.hh: SCCS merged --HG-- extra : convert_revision : a4f6377dbd691ab58fe5f7958b983b092575f250
Diffstat (limited to 'src/mem/cache/miss/mshr.hh')
-rw-r--r--src/mem/cache/miss/mshr.hh22
1 files changed, 11 insertions, 11 deletions
diff --git a/src/mem/cache/miss/mshr.hh b/src/mem/cache/miss/mshr.hh
index 167aa26cd..ad2865973 100644
--- a/src/mem/cache/miss/mshr.hh
+++ b/src/mem/cache/miss/mshr.hh
@@ -44,7 +44,7 @@ class MSHR;
/**
* Miss Status and handling Register. This class keeps all the information
- * needed to handle a cache miss including a list of target requests.
+ * needed to handle a cache miss including a list of target pktuests.
*/
class MSHR {
public:
@@ -63,15 +63,15 @@ class MSHR {
Addr addr;
/** Adress space id of the miss. */
short asid;
- /** True if the request has been sent to the bus. */
+ /** True if the pktuest has been sent to the bus. */
bool inService;
/** Thread number of the miss. */
int threadNum;
- /** The request that is forwarded to the next level of the hierarchy. */
+ /** The pktuest that is forwarded to the next level of the hierarchy. */
Packet * pkt;
/** The number of currently allocated targets. */
short ntargets;
- /** The original requesting command. */
+ /** The original pktuesting command. */
Packet::Command originalCmd;
/** Order number of assigned by the miss queue. */
uint64_t order;
@@ -88,24 +88,24 @@ class MSHR {
Iterator allocIter;
private:
- /** List of all requests that match the address */
+ /** List of all pktuests that match the address */
TargetList targets;
public:
/**
* Allocate a miss to this MSHR.
- * @param cmd The requesting command.
+ * @param cmd The pktuesting command.
* @param addr The address of the miss.
* @param asid The address space id of the miss.
- * @param size The number of bytes to request.
- * @param req The original miss.
+ * @param size The number of bytes to pktuest.
+ * @param pkt The original miss.
*/
void allocate(Packet::Command cmd, Addr addr, int asid, int size,
Packet * &pkt);
/**
- * Allocate this MSHR as a buffer for the given request.
- * @param target The memory request to buffer.
+ * Allocate this MSHR as a buffer for the given pktuest.
+ * @param target The memory pktuest to buffer.
*/
void allocateAsBuffer(Packet * &target);
@@ -115,7 +115,7 @@ public:
void deallocate();
/**
- * Add a request to the list of targets.
+ * Add a pktuest to the list of targets.
* @param target The target.
*/
void allocateTarget(Packet * &target);