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author | Steve Reinhardt <stever@eecs.umich.edu> | 2007-06-24 17:32:31 -0700 |
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committer | Steve Reinhardt <stever@eecs.umich.edu> | 2007-06-24 17:32:31 -0700 |
commit | 47bce8ef7875420b2e26ebd834ed0d4146b65d5b (patch) | |
tree | c1a92ec17e9c534e49df015a1bc67efa3316aa04 /src/mem/cache/miss/mshr.hh | |
parent | 245b0bd9b94bfaaa188b7e945f91c0e4a9909cbe (diff) | |
download | gem5-47bce8ef7875420b2e26ebd834ed0d4146b65d5b.tar.xz |
Better handling of deferred targets.
--HG--
extra : convert_revision : 0fbc28c32c1eeb3dd672df14c1d53bd516f81d0f
Diffstat (limited to 'src/mem/cache/miss/mshr.hh')
-rw-r--r-- | src/mem/cache/miss/mshr.hh | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/src/mem/cache/miss/mshr.hh b/src/mem/cache/miss/mshr.hh index 195438e46..f4e090a12 100644 --- a/src/mem/cache/miss/mshr.hh +++ b/src/mem/cache/miss/mshr.hh @@ -85,9 +85,6 @@ class MSHR : public Packet::SenderState /** Size of the request. */ int size; - /** Data associated with the request (if a write). */ - uint8_t *writeData; - /** True if the request has been sent to the bus. */ bool inService; @@ -95,12 +92,13 @@ class MSHR : public Packet::SenderState bool isCacheFill; /** True if we need to get an exclusive copy of the block. */ bool needsExclusive; + /** True if the request is uncacheable */ bool _isUncacheable; - /** True if the request that has been sent to the bus is for en - * exclusive copy. */ - bool inServiceForExclusive; + bool deferredNeedsExclusive; + bool pendingInvalidate; + /** Thread number of the miss. */ short threadNum; /** The number of currently allocated targets. */ @@ -124,6 +122,8 @@ private: /** List of all requests that match the address */ TargetList targets; + TargetList deferredTargets; + public: bool isUncacheable() { return _isUncacheable; } @@ -153,7 +153,8 @@ public: * Add a request to the list of targets. * @param target The target. */ - void allocateTarget(PacketPtr target, bool cpuSide); + void allocateTarget(PacketPtr target); + void allocateSnoopTarget(PacketPtr target); /** A simple constructor. */ MSHR(); @@ -201,6 +202,8 @@ public: return tgt->isCpuSide() && !tgt->pkt->needsResponse(); } + bool promoteDeferredTargets(); + /** * Prints the contents of this MSHR to stderr. */ |