Add functional PrintReq command for memory-system debugging.

--HG--
extra : convert_revision : 73b753e57c355b7e6873f047ddc8cb371c3136b7

4 files changed, 68 insertions, 29 deletions

diff --git a/src/mem/cache/miss/mshr.cc b/src/mem/cache/miss/mshr.cc
index e2ff444d5..88d2acea0 100644
--- a/src/mem/cache/miss/mshr.cc
+++ b/src/mem/cache/miss/mshr.cc
@@ -133,6 +133,18 @@ MSHR::TargetList::checkFunctional(PacketPtr pkt)
 
 
 void
+MSHR::TargetList::
+print(std::ostream &os, int verbosity, const std::string &prefix) const
+{
+    ConstIterator end_i = end();
+    for (ConstIterator i = begin(); i != end_i; ++i) {
+        ccprintf(os, "%s%s: ", prefix, i->isCpuSide() ? "cpu" : "mem");
+        i->pkt->print(os, verbosity, "");
+    }
+}
+
+
+void
 MSHR::allocate(Addr _addr, int _size, PacketPtr target,
                Tick whenReady, Counter _order)
 {
@@ -350,26 +362,41 @@ MSHR::handleFill(Packet *pkt, CacheBlk *blk)
 }
 
 
+bool
+MSHR::checkFunctional(PacketPtr pkt)
+{
+    // For printing, we treat the MSHR as a whole as single entity.
+    // For other requests, we iterate over the individual targets
+    // since that's where the actual data lies.
+    if (pkt->isPrint()) {
+        pkt->checkFunctional(this, addr, size, NULL);
+        return false;
+    } else {
+        return (targets->checkFunctional(pkt) ||
+                deferredTargets->checkFunctional(pkt));
+    }
+}
+
+
 void
-MSHR::dump()
+MSHR::print(std::ostream &os, int verbosity, const std::string &prefix) const
 {
-    ccprintf(cerr,
-             "inService: %d thread: %d\n"
-             "Addr: %x ntargets %d\n"
-             "Targets:\n",
-             inService, threadNum, addr, ntargets);
-#if 0
-    TargetListIterator tar_it = targets->begin();
-    for (int i = 0; i < ntargets; i++) {
-        assert(tar_it != targets->end());
-
-        ccprintf(cerr, "\t%d: Addr: %x cmd: %s\n",
-                 i, tar_it->pkt->getAddr(), tar_it->pkt->cmdString());
-
-        tar_it++;
+    ccprintf(os, "%s[%x:%x] %s %s %s state: %s %s %s %s\n",
+             prefix, addr, addr+size-1,
+             isCacheFill ? "Fill" : "",
+             needsExclusive() ? "Excl" : "",
+             _isUncacheable ? "Unc" : "",
+             inService ? "InSvc" : "",
+             downstreamPending ? "DwnPend" : "",
+             pendingInvalidate ? "PendInv" : "",
+             pendingShared ? "PendShared" : "");
+
+    ccprintf(os, "%s  Targets:\n", prefix);
+    targets->print(os, verbosity, prefix + "    ");
+    if (!deferredTargets->empty()) {
+        ccprintf(os, "%s  Deferred Targets:\n", prefix);
+        deferredTargets->print(os, verbosity, prefix + "      ");
     }
-#endif
-    ccprintf(cerr, "\n");
 }
 
 MSHR::~MSHR()
diff --git a/src/mem/cache/miss/mshr.hh b/src/mem/cache/miss/mshr.hh
index c865ca3ac..0bc3c4480 100644
--- a/src/mem/cache/miss/mshr.hh
+++ b/src/mem/cache/miss/mshr.hh
@@ -38,6 +38,7 @@
 
 #include <list>
 
+#include "base/printable.hh"
 #include "mem/packet.hh"
 
 class CacheBlk;
@@ -47,7 +48,7 @@ class MSHRQueue;
  * Miss Status and handling Register. This class keeps all the information
  * needed to handle a cache miss including a list of target requests.
  */
-class MSHR : public Packet::SenderState
+class MSHR : public Packet::SenderState, public Printable
 {
 
   public:
@@ -60,7 +61,7 @@ class MSHR : public Packet::SenderState
         PacketPtr pkt;  //!< Pending request packet.
         bool cpuSide;   //!< Did request come from cpu side or mem side?
 
-        bool isCpuSide() { return cpuSide; }
+        bool isCpuSide() const { return cpuSide; }
 
         Target(PacketPtr _pkt, Tick _readyTime, Counter _order, bool _cpuSide)
             : recvTime(curTick), readyTime(_readyTime), order(_order),
@@ -71,6 +72,7 @@ class MSHR : public Packet::SenderState
     class TargetList : public std::list<Target> {
         /** Target list iterator. */
         typedef std::list<Target>::iterator Iterator;
+        typedef std::list<Target>::const_iterator ConstIterator;
 
       public:
         bool needsExclusive;
@@ -83,6 +85,8 @@ class MSHR : public Packet::SenderState
         void replaceUpgrades();
         void clearDownstreamPending();
         bool checkFunctional(PacketPtr pkt);
+        void print(std::ostream &os, int verbosity,
+                   const std::string &prefix) const;
     };
 
     /** A list of MSHRs. */
@@ -114,7 +118,7 @@ class MSHR : public Packet::SenderState
     bool isCacheFill;
 
     /** True if we need to get an exclusive copy of the block. */
-    bool needsExclusive() { return targets->needsExclusive; }
+    bool needsExclusive() const { return targets->needsExclusive; }
 
     /** True if the request is uncacheable */
     bool _isUncacheable;
@@ -231,15 +235,14 @@ public:
 
     void handleFill(Packet *pkt, CacheBlk *blk);
 
-    bool checkFunctional(PacketPtr pkt) {
-        return (targets->checkFunctional(pkt) ||
-                deferredTargets->checkFunctional(pkt));
-    }
+    bool checkFunctional(PacketPtr pkt);
 
     /**
-     * Prints the contents of this MSHR to stderr.
+     * Prints the contents of this MSHR for debugging.
      */
-    void dump();
+    void print(std::ostream &os,
+               int verbosity = 0,
+               const std::string &prefix = "") const;
 };
 
 #endif //__MSHR_HH__
diff --git a/src/mem/cache/miss/mshr_queue.cc b/src/mem/cache/miss/mshr_queue.cc
index 911329e0c..71da7e4c1 100644
--- a/src/mem/cache/miss/mshr_queue.cc
+++ b/src/mem/cache/miss/mshr_queue.cc
@@ -36,8 +36,10 @@
 
 using namespace std;
 
-MSHRQueue::MSHRQueue(int num_entries, int reserve, int _index)
-    : numEntries(num_entries + reserve - 1), numReserve(reserve),
+MSHRQueue::MSHRQueue(const std::string &_label,
+                     int num_entries, int reserve, int _index)
+    : label(_label),
+      numEntries(num_entries + reserve - 1), numReserve(reserve),
       index(_index)
 {
     allocated = 0;
@@ -90,14 +92,17 @@ MSHRQueue::findMatches(Addr addr, vector<MSHR*>& matches) const
 bool
 MSHRQueue::checkFunctional(PacketPtr pkt, Addr blk_addr)
 {
+    pkt->pushLabel(label);
     MSHR::ConstIterator i = allocatedList.begin();
     MSHR::ConstIterator end = allocatedList.end();
     for (; i != end; ++i) {
         MSHR *mshr = *i;
         if (mshr->addr == blk_addr && mshr->checkFunctional(pkt)) {
+            pkt->popLabel();
             return true;
         }
     }
+    pkt->popLabel();
     return false;
 }
 
diff --git a/src/mem/cache/miss/mshr_queue.hh b/src/mem/cache/miss/mshr_queue.hh
index 447ebfc5a..e04745087 100644
--- a/src/mem/cache/miss/mshr_queue.hh
+++ b/src/mem/cache/miss/mshr_queue.hh
@@ -46,6 +46,9 @@
 class MSHRQueue
 {
   private:
+    /** Local label (for functional print requests) */
+    const std::string label;
+
     /**  MSHR storage. */
     MSHR *registers;
     /** Holds pointers to all allocated entries. */
@@ -87,7 +90,8 @@ class MSHRQueue
      * @param reserve The minimum number of entries needed to satisfy
      * any access.
      */
-    MSHRQueue(int num_entries, int reserve, int index);
+    MSHRQueue(const std::string &_label, int num_entries, int reserve,
+              int index);
 
     /** Destructor */
     ~MSHRQueue();