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| author | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2016-05-26 11:56:24 +0100 |
|---|---|---|
| committer | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2016-05-26 11:56:24 +0100 |
| commit | a69a0f33cbe546826756b31dcefbe9d1fdb84b2a (patch) | |
| tree | 179e55753c1e8bdaadde578c6769f690570dc6ee /src/mem/cache/mshr.cc | |
| parent | f9d62b63e10a05be824b094f51f792e9ae4e04f3 (diff) | |
| download | gem5-a69a0f33cbe546826756b31dcefbe9d1fdb84b2a.tar.xz | |
mem: fix headers include order in the cache related classes
Change-Id: Ia57cc104978861ab342720654e408dbbfcbe4b69
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/mem/cache/mshr.cc')
| -rw-r--r-- | src/mem/cache/mshr.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mem/cache/mshr.cc b/src/mem/cache/mshr.cc index 5c4481e02..56284dcc6 100644 --- a/src/mem/cache/mshr.cc +++ b/src/mem/cache/mshr.cc @@ -47,6 +47,8 @@ * Miss Status and Handling Register (MSHR) definitions. */ +#include "mem/cache/mshr.hh" + #include <algorithm> #include <cassert> #include <string> @@ -56,7 +58,6 @@ #include "base/types.hh" #include "debug/Cache.hh" #include "mem/cache/cache.hh" -#include "mem/cache/mshr.hh" #include "sim/core.hh" using namespace std; |