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| author | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2016-10-10 14:25:42 +0100 |
|---|---|---|
| committer | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2018-10-18 09:39:30 +0000 |
| commit | 0ac40753c3dba5fa647006455238acad0cb3e3ec (patch) | |
| tree | 2e8da34a653e87ef3e4ff23b999d8b0c4f7f9870 /src/mem/cache/noncoherent_cache.cc | |
| parent | 6adc2afaa0398a4872b9fd3694311333e8f6ded3 (diff) | |
| download | gem5-0ac40753c3dba5fa647006455238acad0cb3e3ec.tar.xz | |
mem: Determine if an MSHR does a whole-line write
This patch adds support for determining whether the targets in an MSHR
are 1) only writes and 2) whether these writes are effectively a
whole-line write. This patch adds the necessary functions in the MSHR
to allow for write coalescing in the cache.
Change-Id: I2c9a9a83d2d9b506a491ba5b0b9ac1054bdb31b4
Reviewed-on: https://gem5-review.googlesource.com/c/12904
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/mem/cache/noncoherent_cache.cc')
0 files changed, 0 insertions, 0 deletions