diff options
| author | Mrinmoy Ghosh <mrinmoy.ghosh@arm.com> | 2012-02-12 16:07:38 -0600 |
|---|---|---|
| committer | Mrinmoy Ghosh <mrinmoy.ghosh@arm.com> | 2012-02-12 16:07:38 -0600 |
| commit | 7e104a1af235823e3d641a972ea920937f7ec67d (patch) | |
| tree | d109d98f09652ed11b08dfe0d93a531b28d14df7 /src/mem/cache/prefetch/SConscript | |
| parent | b7cf64398f16e93f118060bd49313f1d37f0e324 (diff) | |
| download | gem5-7e104a1af235823e3d641a972ea920937f7ec67d.tar.xz | |
prefetcher: Make prefetcher a sim object instead of it being a parameter on cache
Diffstat (limited to 'src/mem/cache/prefetch/SConscript')
| -rw-r--r-- | src/mem/cache/prefetch/SConscript | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mem/cache/prefetch/SConscript b/src/mem/cache/prefetch/SConscript index 9d05a8ee4..2310940c1 100644 --- a/src/mem/cache/prefetch/SConscript +++ b/src/mem/cache/prefetch/SConscript @@ -32,6 +32,7 @@ Import('*') if env['TARGET_ISA'] == 'no': Return() +SimObject('Prefetcher.py') Source('base.cc') Source('ghb.cc') |