Merge zizzer:/bk/newmem

into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : f4a05accb8fa24d425dd818b1b7f268378180e99

1 files changed, 34 insertions, 8 deletions

diff --git a/src/mem/cache/prefetch/ghb_prefetcher.cc b/src/mem/cache/prefetch/ghb_prefetcher.cc
index a6c419113..d7d819a2d 100644
--- a/src/mem/cache/prefetch/ghb_prefetcher.cc
+++ b/src/mem/cache/prefetch/ghb_prefetcher.cc
@@ -31,18 +31,44 @@
 
 /**
  * @file
- * GHB Prefetcher template instantiations.
+ * GHB Prefetcher implementation.
  */
 
-#include "mem/cache/tags/cache_tags.hh"
+#include "mem/cache/prefetch/ghb_prefetcher.hh"
+#include "arch/isa_traits.hh"
 
-#include "mem/cache/tags/lru.hh"
+void
+GHBPrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
+                                 std::list<Tick> &delays)
+{
+    Addr blkAddr = pkt->getAddr() & ~(Addr)(this->blkSize-1);
+    int cpuID = pkt->req->getCpuNum();
+    if (!useCPUId) cpuID = 0;
 
-#include "mem/cache/prefetch/ghb_prefetcher.hh"
 
-// Template Instantiations
-#ifndef DOXYGEN_SHOULD_SKIP_THIS
+    int new_stride = blkAddr - last_miss_addr[cpuID];
+    int old_stride = last_miss_addr[cpuID] -
+        second_last_miss_addr[cpuID];
 
-template class GHBPrefetcher<CacheTags<LRU> >;
+    second_last_miss_addr[cpuID] = last_miss_addr[cpuID];
+    last_miss_addr[cpuID] = blkAddr;
 
-#endif //DOXYGEN_SHOULD_SKIP_THIS
+    if (new_stride == old_stride) {
+        for (int d=1; d <= degree; d++) {
+            Addr newAddr = blkAddr + d * new_stride;
+            if (this->pageStop &&
+                (blkAddr & ~(TheISA::VMPageSize - 1)) !=
+                (newAddr & ~(TheISA::VMPageSize - 1)))
+            {
+                //Spanned the page, so now stop
+                this->pfSpanPage += degree - d + 1;
+                return;
+            }
+            else
+            {
+                addresses.push_back(newAddr);
+                delays.push_back(latency);
+            }
+        }
+    }
+}