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author | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-12-23 09:31:18 -0500 |
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committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-12-23 09:31:18 -0500 |
commit | df82a2d00311b96ec7fefc901232ba01bbf26d39 (patch) | |
tree | ef7d4ac6cc316d9a67eada5df423d32cef97173d /src/mem/cache/prefetch/queued.hh | |
parent | 6cb58b2bd2ffd19a667e3b9473ff4a0ccfd14c81 (diff) | |
download | gem5-df82a2d00311b96ec7fefc901232ba01bbf26d39.tar.xz |
mem: Rework the structuring of the prefetchers
Re-organizes the prefetcher class structure. Previously the
BasePrefetcher forced multiple assumptions on the prefetchers that
inherited from it. This patch makes the BasePrefetcher class truly
representative of base functionality. For example, the base class no
longer enforces FIFO order. Instead, prefetchers with FIFO requests
(like the existing stride and tagged prefetchers) now inherit from a
new QueuedPrefetcher base class.
Finally, the stride-based prefetcher now assumes a custimizable lookup table
(sets/ways) rather than the previous fully associative structure.
Diffstat (limited to 'src/mem/cache/prefetch/queued.hh')
-rw-r--r-- | src/mem/cache/prefetch/queued.hh | 108 |
1 files changed, 108 insertions, 0 deletions
diff --git a/src/mem/cache/prefetch/queued.hh b/src/mem/cache/prefetch/queued.hh new file mode 100644 index 000000000..7ce9e7b93 --- /dev/null +++ b/src/mem/cache/prefetch/queued.hh @@ -0,0 +1,108 @@ +/* + * Copyright (c) 2014 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Mitch Hayenga + */ + +#ifndef __MEM_CACHE_PREFETCH_QUEUED_HH__ +#define __MEM_CACHE_PREFETCH_QUEUED_HH__ + +#include <list> + +#include "mem/cache/prefetch/base.hh" +#include "params/QueuedPrefetcher.hh" + +class QueuedPrefetcher : public BasePrefetcher +{ + protected: + struct DeferredPacket { + Tick tick; + PacketPtr pkt; + DeferredPacket(Tick t, PacketPtr p) : tick(t), pkt(p) {} + }; + + std::list<DeferredPacket> pfq; + + // PARAMETERS + + /** Maximum size of the prefetch queue */ + const unsigned queueSize; + + /** Cycles after generation when a prefetch can first be issued */ + const Cycles latency; + + /** Squash queued prefetch if demand access observed */ + const bool queueSquash; + + /** Filter prefetches if already queued */ + const bool queueFilter; + + /** Snoop the cache before generating prefetch (cheating basically) */ + const bool cacheSnoop; + + /** Tag prefetch with PC of generating access? */ + const bool tagPrefetch; + + bool inPrefetch(Addr address, bool is_secure) const; + + // STATS + Stats::Scalar pfIdentified; + Stats::Scalar pfBufferHit; + Stats::Scalar pfInCache; + Stats::Scalar pfRemovedFull; + Stats::Scalar pfSpanPage; + + public: + QueuedPrefetcher(const QueuedPrefetcherParams *p); + virtual ~QueuedPrefetcher(); + + Tick notify(const PacketPtr &pkt); + + // Note: This should really be pure virtual, but doesnt go well with params + virtual void calculatePrefetch(const PacketPtr &pkt, + std::vector<Addr> &addresses) = 0; + PacketPtr getPacket(); + + Tick nextPrefetchReadyTime() const + { + return pfq.empty() ? MaxTick : pfq.front().tick; + } + + void regStats(); +}; + +#endif //__MEM_CACHE_PREFETCH_QUEUED_HH__ + |