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| author | Andreas Hansson <andreas.hansson@arm.com> | 2015-03-27 04:56:02 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2015-03-27 04:56:02 -0400 |
| commit | 0197e580e5761cba7c1f643aa9d85d5465964106 (patch) | |
| tree | 0dbc26267015dc08d3d1d4197e3619d027b1059c /src/mem/cache/prefetch/stride.cc | |
| parent | 24763c21775aed939228b1c8f048f8f7982de91c (diff) | |
| download | gem5-0197e580e5761cba7c1f643aa9d85d5465964106.tar.xz | |
mem: Allocate cache writebacks before new MSHRs
This patch changes the order of writeback allocation such that any
writebacks resulting from a tag lookup (e.g. for an uncacheable
access), are added to the writebuffer before any new MSHR entries are
allocated. This ensures that the writebacks logically precedes the new
allocations.
The patch also changes the uncacheable flush to use proper timed (or
atomic) writebacks, as opposed to functional writes.
Diffstat (limited to 'src/mem/cache/prefetch/stride.cc')
0 files changed, 0 insertions, 0 deletions