diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2007-01-03 00:52:30 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-01-03 00:52:30 -0500 |
commit | 8840ebcb00f3988c781063e572b6df5742968f95 (patch) | |
tree | e9711f561dff45b31489a7fb539ed98660e26d0e /src/mem/cache/prefetch/stride_prefetcher.cc | |
parent | a0e8aa6737f534a8e51d866728dd6dc59bef263d (diff) | |
parent | 7d7f3d0e99eca98a5659e73bce56d615f0ed4fc3 (diff) | |
download | gem5-8840ebcb00f3988c781063e572b6df5742968f95.tar.xz |
Merge zizzer:/bk/newmem
into zower.eecs.umich.edu:/eecshome/m5/newmem
--HG--
extra : convert_revision : f4a05accb8fa24d425dd818b1b7f268378180e99
Diffstat (limited to 'src/mem/cache/prefetch/stride_prefetcher.cc')
-rw-r--r-- | src/mem/cache/prefetch/stride_prefetcher.cc | 58 |
1 files changed, 51 insertions, 7 deletions
diff --git a/src/mem/cache/prefetch/stride_prefetcher.cc b/src/mem/cache/prefetch/stride_prefetcher.cc index 2204871cc..8d957182a 100644 --- a/src/mem/cache/prefetch/stride_prefetcher.cc +++ b/src/mem/cache/prefetch/stride_prefetcher.cc @@ -34,15 +34,59 @@ * Stride Prefetcher template instantiations. */ -#include "mem/cache/tags/cache_tags.hh" +#include "mem/cache/prefetch/stride_prefetcher.hh" -#include "mem/cache/tags/lru.hh" +void +StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses, + std::list<Tick> &delays) +{ +// Addr blkAddr = pkt->paddr & ~(Addr)(this->blkSize-1); + int cpuID = pkt->req->getCpuNum(); + if (!useCPUId) cpuID = 0; -#include "mem/cache/prefetch/stride_prefetcher.hh" + /* Scan Table for IAddr Match */ +/* std::list<strideEntry*>::iterator iter; + for (iter=table[cpuID].begin(); + iter !=table[cpuID].end(); + iter++) { + if ((*iter)->IAddr == pkt->pc) break; + } + + if (iter != table[cpuID].end()) { + //Hit in table + + int newStride = blkAddr - (*iter)->MAddr; + if (newStride == (*iter)->stride) { + (*iter)->confidence++; + } + else { + (*iter)->stride = newStride; + (*iter)->confidence--; + } -// Template Instantiations -#ifndef DOXYGEN_SHOULD_SKIP_THIS + (*iter)->MAddr = blkAddr; -template class StridePrefetcher<CacheTags<LRU> >; + for (int d=1; d <= degree; d++) { + Addr newAddr = blkAddr + d * newStride; + if (this->pageStop && + (blkAddr & ~(TheISA::VMPageSize - 1)) != + (newAddr & ~(TheISA::VMPageSize - 1))) + { + //Spanned the page, so now stop + this->pfSpanPage += degree - d + 1; + return; + } + else + { + addresses.push_back(newAddr); + delays.push_back(latency); + } + } + } + else { + //Miss in table + //Find lowest confidence and replace -#endif //DOXYGEN_SHOULD_SKIP_THIS + } +*/ +} |