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authorDaniel R. Carvalho <odanrc@yahoo.com.br>2018-03-09 15:16:41 +0100
committerDaniel Carvalho <odanrc@yahoo.com.br>2018-10-10 18:17:42 +0000
commitf32882d4fc78af3747f81375dfd1ec3e37596c2b (patch)
tree19695aa226b552751fbb672efb95ee6e75819073 /src/mem/cache/tags/base.cc
parent8f58d9fb87c521674f11c78b8939e5ffdf851d39 (diff)
downloadgem5-f32882d4fc78af3747f81375dfd1ec3e37596c2b.tar.xz
mem-cache: Split Tags for indexing policies
Split indexing functionality from tags, so that code duplication is reduced when adding new classes that use different indexing policies, such as set associative, skewed associative or other hash-based policies. An indexing policy defines the mapping between an address' set and its physical location. For example, a conventional set assoc cache maps an address to all ways in a set using an immutable function, that is, a set x is always mapped to set x. However, skewed assoc caches map an address to a different set for each way, using a skewing function. FALRU has been left unmodified as it is a specialization with its own complexity. Change-Id: I0838b41663f21eba0aeab7aeb7839e3703ca3324 Reviewed-on: https://gem5-review.googlesource.com/c/8885 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/mem/cache/tags/base.cc')
-rw-r--r--src/mem/cache/tags/base.cc23
1 files changed, 15 insertions, 8 deletions
diff --git a/src/mem/cache/tags/base.cc b/src/mem/cache/tags/base.cc
index 303eb04e2..dddb8c71d 100644
--- a/src/mem/cache/tags/base.cc
+++ b/src/mem/cache/tags/base.cc
@@ -52,6 +52,7 @@
#include "base/types.hh"
#include "mem/cache/base.hh"
+#include "mem/cache/tags/indexing_policies/base.hh"
#include "mem/request.hh"
#include "sim/core.hh"
#include "sim/sim_exit.hh"
@@ -64,7 +65,7 @@ BaseTags::BaseTags(const Params *p)
accessLatency(p->sequential_access ?
p->tag_latency + p->data_latency :
std::max(p->tag_latency, p->data_latency)),
- cache(nullptr),
+ cache(nullptr), indexingPolicy(p->indexing_policy),
warmupBound((p->warmup_percentage/100.0) * (p->size / p->block_size)),
warmedUp(false), numBlocks(p->size / p->block_size),
dataBlks(new uint8_t[p->size]) // Allocate data storage in one big chunk
@@ -78,10 +79,10 @@ BaseTags::setCache(BaseCache *_cache)
cache = _cache;
}
-std::vector<ReplaceableEntry*>
-BaseTags::getPossibleLocations(const Addr addr) const
+ReplaceableEntry*
+BaseTags::findBlockBySetAndWay(int set, int way) const
{
- panic("Unimplemented getPossibleLocations for tags subclass");
+ return indexingPolicy->getEntry(set, way);
}
CacheBlk*
@@ -90,12 +91,12 @@ BaseTags::findBlock(Addr addr, bool is_secure) const
// Extract block tag
Addr tag = extractTag(addr);
- // Find possible locations for the given address
- const std::vector<ReplaceableEntry*> locations =
- getPossibleLocations(addr);
+ // Find possible entries that may contain the given address
+ const std::vector<ReplaceableEntry*> entries =
+ indexingPolicy->getPossibleEntries(addr);
// Search for block
- for (const auto& location : locations) {
+ for (const auto& location : entries) {
CacheBlk* blk = static_cast<CacheBlk*>(location);
if ((blk->tag == tag) && blk->isValid() &&
(blk->isSecure() == is_secure)) {
@@ -134,6 +135,12 @@ BaseTags::insertBlock(const Addr addr, const bool is_secure,
dataAccesses += 1;
}
+Addr
+BaseTags::extractTag(const Addr addr) const
+{
+ return indexingPolicy->extractTag(addr);
+}
+
void
BaseTags::cleanupRefsVisitor(CacheBlk &blk)
{