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authorPrakash Ramrakhyani <prakash.ramrakhyani@arm.com>2013-06-27 05:49:50 -0400
committerPrakash Ramrakhyani <prakash.ramrakhyani@arm.com>2013-06-27 05:49:50 -0400
commitac515d7a9b131ffc9e128bd209fcddb2f383808b (patch)
tree4a445dffeed869dac321abc09b04d7c3d65601fe /src/mem/cache/tags/base.cc
parent0d68d36b9d12c36e6201fa8bc4bec34258c04eab (diff)
downloadgem5-ac515d7a9b131ffc9e128bd209fcddb2f383808b.tar.xz
mem: Reorganize cache tags and make them a SimObject
This patch reorganizes the cache tags to allow more flexibility to implement new replacement policies. The base tags class is now a clocked object so that derived classes can use a clock if they need one. Also having deriving from SimObject allows specialized Tag classes to be swapped in/out in .py files. The cache set is now templatized to allow it to contain customized cache blocks with additional informaiton. This involved moving code to the .hh file and removing cacheset.cc. The statistics belonging to the cache tags are now including ".tags" in their name. Hence, the stats need an update to reflect the change in naming.
Diffstat (limited to 'src/mem/cache/tags/base.cc')
-rw-r--r--src/mem/cache/tags/base.cc37
1 files changed, 27 insertions, 10 deletions
diff --git a/src/mem/cache/tags/base.cc b/src/mem/cache/tags/base.cc
index 0cabce860..d9909f5de 100644
--- a/src/mem/cache/tags/base.cc
+++ b/src/mem/cache/tags/base.cc
@@ -1,4 +1,16 @@
/*
+ * Copyright (c) 2013 ARM Limited
+ * All rights reserved.
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2003-2005 The Regents of The University of Michigan
* All rights reserved.
*
@@ -41,54 +53,59 @@
using namespace std;
+BaseTags::BaseTags(const Params *p)
+ : ClockedObject(p), blkSize(p->block_size), size(p->size),
+ hitLatency(p->hit_latency)
+{
+}
+
void
BaseTags::setCache(BaseCache *_cache)
{
cache = _cache;
- objName = cache->name();
}
void
-BaseTags::regStats(const string &name)
+BaseTags::regStats()
{
using namespace Stats;
replacements
.init(maxThreadsPerCPU)
- .name(name + ".replacements")
+ .name(name() + ".replacements")
.desc("number of replacements")
.flags(total)
;
tagsInUse
- .name(name + ".tagsinuse")
+ .name(name() + ".tagsinuse")
.desc("Cycle average of tags in use")
;
totalRefs
- .name(name + ".total_refs")
+ .name(name() + ".total_refs")
.desc("Total number of references to valid blocks.")
;
sampledRefs
- .name(name + ".sampled_refs")
+ .name(name() + ".sampled_refs")
.desc("Sample count of references to valid blocks.")
;
avgRefs
- .name(name + ".avg_refs")
+ .name(name() + ".avg_refs")
.desc("Average number of references to valid blocks.")
;
avgRefs = totalRefs/sampledRefs;
warmupCycle
- .name(name + ".warmup_cycle")
+ .name(name() + ".warmup_cycle")
.desc("Cycle when the warmup percentage was hit.")
;
occupancies
.init(cache->system->maxMasters())
- .name(name + ".occ_blocks")
+ .name(name() + ".occ_blocks")
.desc("Average occupied blocks per requestor")
.flags(nozero | nonan)
;
@@ -97,7 +114,7 @@ BaseTags::regStats(const string &name)
}
avgOccs
- .name(name + ".occ_percent")
+ .name(name() + ".occ_percent")
.desc("Average percentage of cache occupancy")
.flags(nozero | total)
;