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authorDaniel R. Carvalho <odanrc@yahoo.com.br>2018-10-18 15:31:51 +0200
committerDaniel Carvalho <odanrc@yahoo.com.br>2018-11-14 21:02:08 +0000
commitc6e0d8f54f1ce90933f95a7a3a875fed53b8ee3e (patch)
tree60bb086bf5b96e5c694eb662f0e34abeae26e6ad /src/mem/cache/tags/base_set_assoc.hh
parentea0f654923d13a2f81fe7c22eeca4c8cffae947a (diff)
downloadgem5-c6e0d8f54f1ce90933f95a7a3a875fed53b8ee3e.tar.xz
mem-cache: Move access latency calculation to Cache
Access latency was not being calculated properly, as it was always assuming that for hits reads take as long as writes, and that parallel accesses would produce the same latency for read and write misses. By moving the calculation to the Cache we can use the write/ read information, reduce latency variables duplication and remove Cache dependency from Tags. The tag lookup latency is still calculated by the Tags. Change-Id: I71bc68fb5c3515b372c3bf002d61b6f048a45540 Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/13697 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/mem/cache/tags/base_set_assoc.hh')
-rw-r--r--src/mem/cache/tags/base_set_assoc.hh27
1 files changed, 9 insertions, 18 deletions
diff --git a/src/mem/cache/tags/base_set_assoc.hh b/src/mem/cache/tags/base_set_assoc.hh
index 58aceb087..bc98afa5e 100644
--- a/src/mem/cache/tags/base_set_assoc.hh
+++ b/src/mem/cache/tags/base_set_assoc.hh
@@ -115,12 +115,13 @@ class BaseSetAssoc : public BaseTags
/**
* Access block and update replacement data. May not succeed, in which case
- * nullptr is returned. This has all the implications of a cache
- * access and should only be used as such. Returns the access latency as a
- * side effect.
+ * nullptr is returned. This has all the implications of a cache access and
+ * should only be used as such. Returns the tag lookup latency as a side
+ * effect.
+ *
* @param addr The address to find.
* @param is_secure True if the target memory space is secure.
- * @param lat The access latency.
+ * @param lat The latency of the tag lookup.
* @return Pointer to the cache block if found.
*/
CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) override
@@ -139,28 +140,18 @@ class BaseSetAssoc : public BaseTags
dataAccesses += allocAssoc;
}
+ // If a cache hit
if (blk != nullptr) {
- // If a cache hit
- lat = accessLatency;
- // Check if the block to be accessed is available. If not,
- // apply the accessLatency on top of block->whenReady.
- if (blk->whenReady > curTick() &&
- cache->ticksToCycles(blk->whenReady - curTick()) >
- accessLatency) {
- lat = cache->ticksToCycles(blk->whenReady - curTick()) +
- accessLatency;
- }
-
// Update number of references to accessed block
blk->refCount++;
// Update replacement data of accessed block
replacementPolicy->touch(blk->replacementData);
- } else {
- // If a cache miss
- lat = lookupLatency;
}
+ // The tag lookup latency is the same for a hit or a miss
+ lat = lookupLatency;
+
return blk;
}