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author | Ron Dreslinski <rdreslin@umich.edu> | 2006-08-15 16:21:46 -0400 |
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committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-08-15 16:21:46 -0400 |
commit | d5ac1cb51f2e08531794e1dcbb17e47f51041c4f (patch) | |
tree | 79d49fad55c832837f4cf2a8453df72ba83d1bee /src/mem/cache/tags/lru.hh | |
parent | d0d0d7b636c20ad0fafec885c246711ec4218fff (diff) | |
download | gem5-d5ac1cb51f2e08531794e1dcbb17e47f51041c4f.tar.xz |
Pulled out changes to fix EIO programs with caches. Also fixes any translatingPort read/write Blob function problems with caches.
-Basically removed the ASID from places it is no longer needed due to PageTable
src/mem/cache/cache.hh:
src/mem/cache/cache_impl.hh:
src/mem/cache/miss/blocking_buffer.cc:
src/mem/cache/miss/blocking_buffer.hh:
src/mem/cache/miss/miss_queue.cc:
src/mem/cache/miss/miss_queue.hh:
src/mem/cache/miss/mshr.cc:
src/mem/cache/miss/mshr.hh:
src/mem/cache/miss/mshr_queue.cc:
src/mem/cache/miss/mshr_queue.hh:
src/mem/cache/prefetch/base_prefetcher.cc:
src/mem/cache/prefetch/base_prefetcher.hh:
src/mem/cache/tags/fa_lru.cc:
src/mem/cache/tags/fa_lru.hh:
src/mem/cache/tags/iic.cc:
src/mem/cache/tags/iic.hh:
src/mem/cache/tags/lru.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.cc:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.cc:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.cc:
src/mem/cache/tags/split_lru.hh:
Remove asid where it wasn't neccesary anymore due to Page Table
--HG--
extra : convert_revision : ab8bbf4cc47b9eaefa9cdfa790881a21d0e7bf28
Diffstat (limited to 'src/mem/cache/tags/lru.hh')
-rw-r--r-- | src/mem/cache/tags/lru.hh | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mem/cache/tags/lru.hh b/src/mem/cache/tags/lru.hh index 8f0f3ae27..a3a56a0e6 100644 --- a/src/mem/cache/tags/lru.hh +++ b/src/mem/cache/tags/lru.hh @@ -72,7 +72,7 @@ class CacheSet * @param tag The Tag to find. * @return Pointer to the block if found. */ - LRUBlk* findBlk(int asid, Addr tag) const; + LRUBlk* findBlk(Addr tag) const; /** * Move the given block to the head of the list. @@ -158,14 +158,14 @@ public: * @param addr The address to find. * @return True if the address is in the cache. */ - bool probe(int asid, Addr addr) const; + bool probe(Addr addr) const; /** * Invalidate the block containing the given address. * @param asid The address space ID. * @param addr The address to invalidate. */ - void invalidateBlk(int asid, Addr addr); + void invalidateBlk(Addr addr); /** * Finds the given address in the cache and update replacement data. @@ -184,7 +184,7 @@ public: * @param lat The access latency. * @return Pointer to the cache block if found. */ - LRUBlk* findBlock(Addr addr, int asid, int &lat); + LRUBlk* findBlock(Addr addr, int &lat); /** * Finds the given address in the cache, do not update replacement data. @@ -192,7 +192,7 @@ public: * @param asid The address space ID. * @return Pointer to the cache block if found. */ - LRUBlk* findBlock(Addr addr, int asid) const; + LRUBlk* findBlock(Addr addr) const; /** * Find a replacement block for the address provided. @@ -309,7 +309,7 @@ public: * @param asid The address space DI. * @param writebacks List for any generated writeback pktuests. */ - void doCopy(Addr source, Addr dest, int asid, PacketList &writebacks); + void doCopy(Addr source, Addr dest, PacketList &writebacks); /** * No impl. |