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authorAli Saidi <saidi@eecs.umich.edu>2008-09-10 14:26:15 -0400
committerAli Saidi <saidi@eecs.umich.edu>2008-09-10 14:26:15 -0400
commit3a3e356f4e61e86f6f1427dd85cf1e41fa9125c0 (patch)
treec9e147a14bcab9e4767ad13a00ac4a375044c441 /src/mem/cache/tags
parent09a8fb0b5263d4b41b8206ce075a3f6923907d65 (diff)
downloadgem5-3a3e356f4e61e86f6f1427dd85cf1e41fa9125c0.tar.xz
style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
Diffstat (limited to 'src/mem/cache/tags')
-rw-r--r--src/mem/cache/tags/iic.cc2
-rw-r--r--src/mem/cache/tags/lru.cc4
-rw-r--r--src/mem/cache/tags/lru.hh2
-rw-r--r--src/mem/cache/tags/split_lru.cc4
4 files changed, 6 insertions, 6 deletions
diff --git a/src/mem/cache/tags/iic.cc b/src/mem/cache/tags/iic.cc
index 2825599f6..af9a75d43 100644
--- a/src/mem/cache/tags/iic.cc
+++ b/src/mem/cache/tags/iic.cc
@@ -365,7 +365,7 @@ IIC::freeReplacementBlock(PacketList & writebacks)
tag_ptr->refCount = 0;
if (tag_ptr->isDirty()) {
-/* PacketPtr writeback =
+/* PacketPtr writeback =
buildWritebackReq(regenerateBlkAddr(tag_ptr->tag, 0),
tag_ptr->req->asid, tag_ptr->xc, blkSize,
tag_ptr->data,
diff --git a/src/mem/cache/tags/lru.cc b/src/mem/cache/tags/lru.cc
index 7f352e9c4..7fb5318a0 100644
--- a/src/mem/cache/tags/lru.cc
+++ b/src/mem/cache/tags/lru.cc
@@ -113,7 +113,7 @@ LRU::LRU(int _numSets, int _blkSize, int _assoc, int _hit_latency) :
// allocate data storage in one big chunk
dataBlks = new uint8_t[numSets*assoc*blkSize];
- blkIndex = 0; // index into blks array
+ blkIndex = 0; // index into blks array
for (i = 0; i < numSets; ++i) {
sets[i].assoc = assoc;
@@ -160,7 +160,7 @@ LRU::probe(Addr addr) const
LRUBlk *blk = sets[myset].findBlk(tag);
- return (blk != NULL); // true if in cache
+ return (blk != NULL); // true if in cache
}
LRUBlk*
diff --git a/src/mem/cache/tags/lru.hh b/src/mem/cache/tags/lru.hh
index ea5606cde..65be492de 100644
--- a/src/mem/cache/tags/lru.hh
+++ b/src/mem/cache/tags/lru.hh
@@ -127,7 +127,7 @@ public:
* @param _assoc The associativity of the cache.
* @param _hit_latency The latency in cycles for a hit.
*/
- LRU(int _numSets, int _blkSize, int _assoc, int _hit_latency);
+ LRU(int _numSets, int _blkSize, int _assoc, int _hit_latency);
/**
* Destructor
diff --git a/src/mem/cache/tags/split_lru.cc b/src/mem/cache/tags/split_lru.cc
index bcccdcb30..2b01b07cd 100644
--- a/src/mem/cache/tags/split_lru.cc
+++ b/src/mem/cache/tags/split_lru.cc
@@ -113,7 +113,7 @@ SplitLRU::SplitLRU(int _numSets, int _blkSize, int _assoc, int _hit_latency, int
// allocate data storage in one big chunk
dataBlks = new uint8_t[numSets*assoc*blkSize];
- blkIndex = 0; // index into blks array
+ blkIndex = 0; // index into blks array
for (i = 0; i < numSets; ++i) {
sets[i].assoc = assoc;
@@ -179,7 +179,7 @@ SplitLRU::probe(Addr addr) const
SplitBlk *blk = sets[myset].findBlk(tag);
- return (blk != NULL); // true if in cache
+ return (blk != NULL); // true if in cache
}
SplitBlk*