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authorNikos Nikoleris <nikos.nikoleris@arm.com>2016-05-26 11:56:24 +0100
committerNikos Nikoleris <nikos.nikoleris@arm.com>2016-05-26 11:56:24 +0100
commit90bf50b4c7249a4f5529245a82bc59370de468bd (patch)
treed239057e95ba840d516f0e87797dd59f6b4fc0e7 /src/mem/cache/tags
parentf385adc8af744e7f6b78ff9adafd9c3ecf65ce68 (diff)
downloadgem5-90bf50b4c7249a4f5529245a82bc59370de468bd.tar.xz
mem: fix the line length in the cache related classes
Change-Id: I6d1feb164a958dde0da87a1cd2698096112c4a82 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/mem/cache/tags')
-rw-r--r--src/mem/cache/tags/fa_lru.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mem/cache/tags/fa_lru.hh b/src/mem/cache/tags/fa_lru.hh
index 2c34be08f..0dd402cea 100644
--- a/src/mem/cache/tags/fa_lru.hh
+++ b/src/mem/cache/tags/fa_lru.hh
@@ -177,8 +177,8 @@ public:
void invalidate(CacheBlk *blk) override;
/**
- * Access block and update replacement data. May not succeed, in which case
- * NULL pointer is returned. This has all the implications of a cache
+ * Access block and update replacement data. May not succeed, in which
+ * case NULL pointer is returned. This has all the implications of a cache
* access and should only be used as such.
* Returns the access latency and inCache flags as a side effect.
* @param addr The address to look for.