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| author | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2018-02-02 17:34:40 +0000 |
|---|---|---|
| committer | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2018-05-31 15:12:04 +0000 |
| commit | 41db9b95aa234094da62fdd3a863870b175d8f97 (patch) | |
| tree | 433ad327b0e148bbacc65e1fcfdb87e41f1c4cb4 /src/mem/cache/write_queue_entry.cc | |
| parent | d5c4dd986a48f13cc774e487993634d8c2b68e10 (diff) | |
| download | gem5-41db9b95aa234094da62fdd3a863870b175d8f97.tar.xz | |
mem-cache: Adopt a more sensible cache class hierarchy
This patch changes what goes into the BaseCache and what goes into the
Cache, to make it easier to add a NoncoherentCache with as much re-use
as possible. A number of redundant members and definitions are also
removed in the process.
This is a modified version of a changeset put together by Andreas
Hansson <andreas.hansson@arm.com>
Change-Id: Ie9dd73c4ec07732e778e7416b712dad8b4bd5d4b
Reviewed-on: https://gem5-review.googlesource.com/10431
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/mem/cache/write_queue_entry.cc')
| -rw-r--r-- | src/mem/cache/write_queue_entry.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/cache/write_queue_entry.cc b/src/mem/cache/write_queue_entry.cc index b8275e13e..4aa174b5a 100644 --- a/src/mem/cache/write_queue_entry.cc +++ b/src/mem/cache/write_queue_entry.cc @@ -139,7 +139,7 @@ WriteQueueEntry::checkFunctional(PacketPtr pkt) } bool -WriteQueueEntry::sendPacket(Cache &cache) +WriteQueueEntry::sendPacket(BaseCache &cache) { return cache.sendWriteQueuePacket(this); } |