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| author | Stephan Diestelhorst <stephan.diestelhorst@arm.com> | 2015-08-10 11:25:52 +0100 |
|---|---|---|
| committer | Stephan Diestelhorst <stephan.diestelhorst@arm.com> | 2015-08-10 11:25:52 +0100 |
| commit | f703160e5a49bf22b831d3a7f3355d7b4b3008fa (patch) | |
| tree | 8132b091e55a29cbb9e76f9844b794fc8898be43 /src/mem/cache | |
| parent | cabd4768c7186911fda91b9ea458df775b79486a (diff) | |
| download | gem5-f703160e5a49bf22b831d3a7f3355d7b4b3008fa.tar.xz | |
mem, cpu: Add assertions to snoop invalidation logic
This patch adds assertions that enforce that only invalidating snoops
will ever reach into the logic that tracks in-order load completion and
also invalidation of LL/SC (and MONITOR / MWAIT) monitors. Also adds
some comments to MSHR::replaceUpgrades().
Diffstat (limited to 'src/mem/cache')
| -rw-r--r-- | src/mem/cache/blk.hh | 2 | ||||
| -rw-r--r-- | src/mem/cache/mshr.hh | 6 |
2 files changed, 8 insertions, 0 deletions
diff --git a/src/mem/cache/blk.hh b/src/mem/cache/blk.hh index 39d45d6e1..700847030 100644 --- a/src/mem/cache/blk.hh +++ b/src/mem/cache/blk.hh @@ -335,6 +335,8 @@ class CacheBlk */ bool checkWrite(PacketPtr pkt) { + assert(pkt->isWrite()); + // common case if (!pkt->isLLSC() && lockList.empty()) return true; diff --git a/src/mem/cache/mshr.hh b/src/mem/cache/mshr.hh index 82a674672..ea3719343 100644 --- a/src/mem/cache/mshr.hh +++ b/src/mem/cache/mshr.hh @@ -149,7 +149,13 @@ class MSHR : public Packet::SenderState, public Printable bool isReset() const { return !needsWritable && !hasUpgrade; } void add(PacketPtr pkt, Tick readyTime, Counter order, Target::Source source, bool markPending); + + /** + * Convert upgrades to the equivalent request if the cache line they + * refer to would have been invalid (Upgrade -> ReadEx, SC* -> Fail). + * Used to rejig ordering between targets waiting on an MSHR. */ void replaceUpgrades(); + void clearDownstreamPending(); bool checkFunctional(PacketPtr pkt); void print(std::ostream &os, int verbosity, |